ADS1298IPAG - 8-Ch 24-Bit ECG AFE, 14.1mW | Texas Instruments
料号： ADS1298IPAG ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $14.709 | $14.71 |
ADS1298IPAG 概述
An analog front-end is the signal-conditioning and conversion stage placed between analog physiological sensors and a digital host processor. In the broader component taxonomy, the ADS1298IPAG is an AFE -> data converter (ADC) -> mixed-signal IC -> semiconductor. Delta-sigma ADCs use oversampling and noise shaping to achieve very high resolution (24-bit) at the cost of absolute input bandwidth, making them the standard choice for low-frequency, high-precision biopotential measurements where microvolt-level signals must be resolved in the presence of large DC offsets and 50/60 Hz line interference.
Key features of the ADS1298IPAG include 4 uVPP input-referred noise (at 150 Hz bandwidth with gain = 6), 200 pA input bias current, built-in right-leg drive (RLD) amplifier, on-chip Wilson central terminal (WCT) generator for 12-lead ECG derivation, internal lead-off detection, and a flexible SPI-compatible serial interface. Eight channels are sampled simultaneously, eliminating skew between leads in multi-channel ECG/EMG recordings.
The device operates from a unipolar analog supply of 2.7 V to 5.5 V (AVDD) and a digital I/O supply of 1.65 V to 3.6 V (DVDD). Its input common-mode range and high CMRR (typical > -100 dB) allow direct connection to skin electrodes without external instrumentation amplifiers. The integrated PGA offers gains from 1 to 12, supporting sensor signals ranging from sub-millivolt EEG to several-millivolt EMG.
Typical applications include 12-lead clinical ECG monitors, portable patient telemetry, Holter recorders, EEG/EMG front-ends, evoked-potential biopotential acquisition, sleep-stage monitors, and bioimpedance research accessories. When using this device, ensure the unused channels are tied to AVDD (not GND) to prevent ESD paths from injecting noise; place AVSS and DGND ground returns as a star ground near the IC; and bypass AVDD/AVSS with 10 uF + 0.1 uF ceramic pairs within 5 mm of the pins.
直接替换替代料： ADS1298IPAG ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： ADS1298IPAG （相同外形与封装尺寸） ——差异在于 Input-Referred Noise, Internal Reference, Operating Temperature, PGA Gain Range, Package.
快速对比工具——选择替代料号进行并排对比：
ADS1296IPAG
✅ 直接替换📋 参考替代料（不在目录中）
ADS1294IPAG
✅ 直接替换📋 参考替代料（不在目录中）
ADS1298RIPAG
✅ 直接替换📋 参考替代料（不在目录中）
ADS1296RIPAG
✅ 直接替换📋 参考替代料（不在目录中）
ADS1294RIPAG
✅ 直接替换📋 参考替代料（不在目录中）
ADS1298IPAGR
✅ 直接替换📋 参考替代料（不在目录中）
ADS1298IPAG 最大额定值与电气特性
| Number of Channels | 8 |
| 分辨率 | 24 bit |
| ADC Architecture | Delta-Sigma (simultaneous sampling) |
| Total Power Consumption | 14.1 mW |
| Power per Channel | 0.75 mW/channel |
| Input-Referred Noise | 4 uVPP (150 Hz BW, gain = 6) |
| Input Bias Current | 200 pA |
| PGA Gain Range | 1 to 12 |
| Analog Supply Voltage (AVDD) | 2.7 V to 5.5 V |
| Digital Supply Voltage (DVDD) | 1.65 V to 3.6 V |
| 工作温度 | -40 C to +85 C |
| 封装 | TQFP-64 (PAG), 10x10 mm |
| 安装类型 | Surface Mount |
| Built-in Right-Leg Drive (RLD) | Yes |
| Built-in Wilson Central Terminal (WCT) | Yes |
| On-chip Lead-Off Detection | Yes |
| Internal Reference | Yes |
| Onboard Oscillator | Yes |
| 接口 | SPI-compatible serial |
| RoHS 状态 | Compliant |
ADS1298IPAG 引脚配置
| 引脚 1 | AVDD — Analog supply, 2.7 V to 5.5 V |
| 引脚 2 | AVSS — Analog ground |
| 引脚 3 | IN1P — Channel 1 positive analog input |
| 引脚 4 | IN1N — Channel 1 negative analog input |
| 引脚 5 | IN2P — Channel 2 positive analog input |
| 引脚 6 | IN2N — Channel 2 negative analog input |
| 引脚 7 | IN3P — Channel 3 positive analog input |
| 引脚 8 | IN3N — Channel 3 negative analog input |
| 引脚 9 | IN4P — Channel 4 positive analog input |
| 引脚 10 | IN4N — Channel 4 negative analog input |
| 引脚 11 | IN5P — Channel 5 positive analog input |
| 引脚 12 | IN5N — Channel 5 negative analog input |
| 引脚 13 | IN6P — Channel 6 positive analog input |
| 引脚 14 | IN6N — Channel 6 negative analog input |
| 引脚 15 | IN7P — Channel 7 positive analog input |
| 引脚 16 | IN7N — Channel 7 negative analog input |
| 引脚 17 | IN8P — Channel 8 positive analog input |
| 引脚 18 | IN8N — Channel 8 negative analog input |
| 引脚 19 | WCT — Wilson Central Terminal output |
| 引脚 20 | RLDINV — Right-leg drive inverting input |
| 引脚 21 | RLDFB — Right-leg drive feedback |
| 引脚 22 | RLDOUT — Right-leg drive output to subject |
| 引脚 23 | AVSS — Analog ground |
| 引脚 24 | AVDD — Analog supply |
| 引脚 25 | GPIO1 — General-purpose I/O 1 |
| 引脚 26 | GPIO2 — General-purpose I/O 2 |
| 引脚 27 | GPIO3 — General-purpose I/O 3 |
| 引脚 28 | GPIO4 — General-purpose I/O 4 |
| 引脚 29 | PWDN — Power-down input, active low |
| 引脚 30 | RESET — Reset input, active low |
| 引脚 31 | START — Start of conversion input |
| 引脚 32 | DRDY — Data ready output, active low |
| 引脚 33 | CS — SPI chip select, active low |
| 引脚 34 | SCLK — SPI serial clock |
| 引脚 35 | DIN — SPI serial data input |
| 引脚 36 | DOUT — SPI serial data output |
| 引脚 37 | DVDD — Digital I/O supply, 1.65 V to 3.6 V |
| 引脚 38 | DGND — Digital ground |
| 引脚 39 | CLKSEL — Clock select (internal oscillator vs external) |
| 引脚 40 | CLK — External clock input |
| 引脚 41 | TEST1 — Test pin 1 (tie to AVSS or leave open per datasheet) |
| 引脚 42 | TEST2 — Test pin 2 (tie to AVSS or leave open per datasheet) |
| 引脚 43 | AVDD — Analog supply |
| 引脚 44 | AVSS — Analog ground |
| 引脚 45 | VCAP1 — Decoupling capacitor pin for internal reference |
| 引脚 46 | VREF — Voltage reference output (4.5 V typical) |
| 引脚 47 | AVSS — Analog ground |
| 引脚 48 | AVDD — Analog supply |
| 引脚 49 | NC — Not connected (per datasheet) |
| 引脚 50 | NC — Not connected (per datasheet) |
| 引脚 51 | NC — Not connected (per datasheet) |
| 引脚 52 | NC — Not connected (per datasheet) |
| 引脚 53 | AVDD — Analog supply |
| 引脚 54 | AVSS — Analog ground |
| 引脚 55 | AVDD — Analog supply |
| 引脚 56 | AVSS — Analog ground |
| 引脚 57 | AVDD — Analog supply |
| 引脚 58 | AVSS — Analog ground |
| 引脚 59 | AVDD — Analog supply |
| 引脚 60 | AVSS — Analog ground |
| 引脚 61 | AVDD — Analog supply |
| 引脚 62 | AVSS — Analog ground |
| 引脚 63 | AVDD — Analog supply |
| 引脚 64 | AVSS — Analog ground |
典型应用
ADS1298IPAG 适用于 6 应用s: 12-Lead Clinical ECG Monitor, Portable Holter / Patient Telemetry, EEG / Sleep-Stage Monitor, EMG / Bioimpedance Research, Evoked-Potential Biopotential Acquisition, Stress-Test / Exercise ECG.
12-Lead Clinical ECG Monitor
The ADS1298IPAG's 8 simultaneous-sampling 24-bit channels make it a strong fit for 12-lead diagnostic ECG monitors, where it derives 8 physical limb/chest leads (RA, LA, LL, V1-V6) plus the synthesized Wilson Central Terminal (WCT) and Right-Leg Drive (RLD) references that complete the standard 12-lead set. The 4 uVPP input-referred noise at 150 Hz bandwidth and gain of 6 keeps diagnostic-grade signal-to-noise well above the IEC 60601-2-51 minimum, while the integrated RLD amplifier eliminates the need for an external op-amp stage. Designers using this chip benefit from per-channel sampling synchrony that prevents inter-lead timing skew, a critical artifact source in 12-lead interpretation. Power dissipation of 14.1 mW across 8 channels keeps battery-operated cart-based designs thermally simple.
推荐
Portable Holter / Patient Telemetry
Holter recorders and wearable patient telemetry patches benefit from the ADS1298IPAG's 0.75 mW per-channel power consumption and small TQFP-64 (10x10 mm) footprint, enabling 24-72 hour ambulatory recording on a single Li-ion cell. The 24-bit resolution captures ST-segment deviations as small as 10 uV, while the integrated lead-off detection continuously verifies electrode contact without host polling overhead. Designers using this part get an integrated respiration modulation feature (in the ADS1298R variant) that is essential for sleep-apnea screening without extra circuitry. The on-chip PGA gain of 1-12 supports both adult and pediatric electrode impedances without external gain stages.
推荐
EEG / Sleep-Stage Monitor
EEG and sleep-stage monitors use the ADS1298IPAG's high input impedance (200 pA bias current) and CMRR > 100 dB to capture sub-Hz to 150 Hz brain-wave activity through high-impedance scalp electrodes. The simultaneous sampling eliminates phase skew across channels, preserving the temporal relationships required for spectral analysis (delta, theta, alpha, beta, gamma bands). The integrated right-leg drive amplifier drives the reference electrode to cancel 50/60 Hz line noise at the body level, often reducing the digital notch requirement. Designers using this chip benefit from an internal oscillator that removes the need for an external crystal, simplifying BOM and shrinking the wearable form factor.
推荐
EMG / Bioimpedance Research
Surface EMG and bioimpedance research setups leverage the ADS1298IPAG's programmable gain (1-12) and 24-bit dynamic range to capture muscle activity across a wide amplitude range, from microvolt-level single-motor-unit potentials to millivolt-level compound muscle action potentials. The high input impedance accommodates dry-electrode arrays in research accessories, and the SPI interface streams multiple peripheral samples at up to 32 kSPS per channel for high-resolution motor-unit decomposition. Designers using this part get simultaneous sampling across 8 muscle groups for gait analysis and sports-science wearables. The internal reference eliminates external precision-voltage components, simplifying calibration.
推荐
Evoked-Potential Biopotential Acquisition
Evoked-potential (EP) systems - including auditory brainstem response (ABR), visual evoked potential (VEP), and somatosensory evoked potential (SSEP) - require averaging thousands of low-amplitude stimulus-locked responses, a use case where the ADS1298IPAG's 4 uVPP noise floor and 24-bit resolution enable single-trial resolution above 1 uV. The simultaneous 8-channel sampling preserves latency differences between stimulation sites, critical for diagnosing neurological disorders. The on-chip programmable data rates (from 125 SPS to 32 kSPS) allow trading bandwidth for noise to match each EP modality. Designers using this configuration benefit from the same SPI interface and footprint for ECG, EMG, and EP accessories, reducing platform development time.
推荐
Stress-Test / Exercise ECG
Treadmill stress-test ECG systems push electrode contact stability to the limit, where the ADS1298IPAG's on-chip lead-off detection continuously monitors each electrode's impedance and flags disconnections without host intervention. The integrated Wilson Central Terminal generator and Right-Leg Drive amplifier maintain stable common-mode rejection as the patient moves and sweats, preserving signal quality during exercise. The simultaneous 8-channel sampling captures transient ST-segment depression events that occur during peak exertion. Designers using this device benefit from the -40 C to +85 C industrial temperature range, suitable for the warmer electronics enclosures used in cart-mounted stress-test systems.
推荐
推荐产品汇总
工程参考数据： ADS1298IPAG ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | ADS1296IPAG | ADS1294IPAG | ADS1298RIPAG | ADS1296RIPAG | ADS1294RIPAG |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | TQFP-64 (PAG, 10x10 mm) | TQFP-64 (PAG, 10x10 mm) - same | TQFP-64 (PAG, 10x10 mm) - same | TQFP-64 (PAG, 10x10 mm) - same | TQFP-64 (PAG, 10x10 mm) - same | TQFP-64 (PAG, 10x10 mm) - same |
| Number of Channels | 8 | 6 | 4 | 8 (with respiration) | 6 (with respiration) | 4 (with respiration) |
| Resolution | 24 bit | 24 bit | 24 bit | 24 bit | 24 bit | 24 bit |
| Input-Referred Noise | 4 uVPP (150 Hz BW, gain=6) | 4 uVPP (150 Hz BW, gain=6) | 4 uVPP (150 Hz BW, gain=6) | 4 uVPP (150 Hz BW, gain=6) | 4 uVPP (150 Hz BW, gain=6) | 4 uVPP (150 Hz BW, gain=6) |
| Respiration Modulation | No | No | No | Yes | Yes | Yes |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Supply Voltage (AVDD) | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| RoHS Status | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
关键差异点
- Highest channel count in the pin-compatible ADS129x family （对比 ADS1296IPAG (6 channels))
- Optional respiration modulation without changing PCB （对比 ADS1298RIPAG)
- Integrates biopotential-specific features unavailable in general-purpose AFEs （对比 ADS131E08IPAG (general-purpose 24-bit ADC, same package))
设计说明
Power the ADS1298IPAG from a clean low-noise LDO such as the TPS7A4701 (4.17 uVrms noise) on the AVDD rail, and from a separate digital LDO on the DVDD rail. According to TI application notes, do not share the analog and digital LDO inputs - star-ground routing at the IC AVSS pin prevents digital switching noise (up to ~30 mVpp on a 3.3 V digital rail) from coupling into the 4 uVPP-sensitive ADC input. Place 10 uF + 0.1 uF ceramic bypass pairs within 5 mm of every AVDD/AVSS pin pair.
Unused INxP / INxN input pins MUST be tied to AVDD, NOT to AVSS. According to the TI ADS1298 datasheet, leaving unused inputs floating enables ESD paths that inject offset drift and noise into adjacent active channels. For 8-channel layouts, route the INxP / INxN differential pairs as tightly coupled 50 ohm microstrip over a continuous ground pour on layer 2, keeping the pair length under 10 mm to avoid 50/60 Hz common-mode pickup.
Do not connect electrode cables to the ADS1298IPAG without populating the input RC anti-alias filter (typically 10 kohm + 1 nF per input). According to the TI ADS1298 datasheet, omitting the input filter allows RF interference above the modulator sampling frequency (fMOD = fCLK / 2) to fold back into the baseband, raising the effective input-referred noise by 10-50x. Verify with a spectrum analyzer that no cellular-band signal exceeds -20 dBm at the INxP / INxN pins during bench bring-up.
Separate the AVSS analog ground return from the DGND digital ground return; join them only at the IC AVSS/DGND pins under the package (single-point star ground at the IC). According to the TI ADS129x layout guidelines, any shared ground trace length between AVSS and DGND creates a 0.5-5 ohm impedance that injects digital return current into the analog input. Use a 4-layer PCB with dedicated layer-2 ground plane and layer-3 power plane; do not route any digital signals across the analog input area.
合规信息
RoHS compliant per TI product page. Industrial -40C to +85C temperature range. Not AEC-Q100 qualified (this is a medical/biopotential AFE, not an automotive part).
