ADS774KU - 12-Bit 125 kSPS SAR ADC | Texas Instruments
料号： ADS774KU ✗ 停产ADS774KU 概述
An ADC is an interface IC that converts an analog voltage into a digital code for processing, measurement, or control. The successive-approximation, or SAR, architecture compares the sampled input against an internal CDAC and internal reference through a sequence of conversion steps. The ADS774 family follows the hierarchy of data-converter IC, analog-to-digital converter, and microprocessor-compatible sampling ADC, reducing the need for external sample-and-hold and supporting direct connection to parallel microprocessor buses.
The primary electrical features include 12-bit resolution, one single-ended analog input, a maximum sampling rate of 125 kSPS, and a maximum conversion time of 8.5 microseconds over temperature. The converter can operate from a single +5 V supply and supports analog input ranges extending to ±16.5 V in the cited family information. Its internal reference, clock, sampling network, and byte-wide parallel interface make it suitable for compact data-acquisition and industrial-control systems.
Internally, the ADS774 uses a low-power CMOS capacitor-array DAC and successive-approximation conversion sequence. Internal sampling captures the input before conversion, while the reference and oscillator support a self-contained measurement channel. The byte-wide parallel outputs suit microprocessors and control logic that read the converted code directly. Designers should still verify acquisition timing, bus timing, input settling, and reference requirements against the manufacturer datasheet for the exact operating conditions.
Typical uses include industrial process monitoring, sensor signal acquisition, laboratory measurement equipment, embedded control systems, and legacy microprocessor-based data acquisition. The 28-pin SOIC package also supports board-level migration to documented pin-compatible ADS774 family variants when temperature grade, accuracy, or lifecycle requirements differ.
Layout and signal-integrity practices are as important as nominal converter performance. Keep analog input traces short, place input and reference bypass components close to their associated pins, and route digital outputs away from sensitive analog nodes. Confirm acquisition time against the source-impedance and sampling-capacitor requirements before selecting the input buffer or external network.
This page organizes the ADS774KU specifications, lifecycle information, package details, drop-in family alternatives, comparison data, and application guidance into one engineering reference. Use the manufacturer datasheet for the definitive pin description, timing diagrams, electrical limits, and ordering information.
直接替换替代料： ADS774KU ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
ADS774JU/1K
✅ 直接替换📋 参考替代料（不在目录中）
ADS774HIBDW
✅ 直接替换📋 参考替代料（不在目录中）
ADS774HIDW
✅ 直接替换📋 参考替代料（不在目录中）
ADS774KU 最大额定值与电气特性
| 分辨率 | 12 bit |
| Maximum Sampling Rate | 125 kSPS |
| Maximum Conversion Time | 8.5 us over temperature |
| Architecture | Successive approximation (SAR) |
| Converter Type | Sampling CMOS ADC |
| Number of Analog Inputs | 1 |
| Input Type | Single-ended |
| Internal Conversion Mechanism | 12-bit capacitor-array DAC (CDAC) |
| Reference | Internal |
| Clock | Internal |
| Output Interface | Byte-wide parallel |
| Sampling Circuit | Internal |
| 电源电压 | +5 V |
| Analog Supply Range | ±16.5 V |
| 工作温度范围 | -40 C to +85 C |
| 封装 | 28-pin SOIC (DW) |
| 安装类型 | Surface mount |
| RoHS 状态 | Compliant |
ADS774KU 28-pin soic (dw) 引脚配置指南
ADS774KU（28-pin soic (dw) 封装）的引脚配置。 该模拟元件具有输入、输出和电源引脚。请参阅制造商数据手册以了解失调调零、补偿和使能引脚配置。适用于信号调理和放大器电路。
暂无详细引脚数据： ADS774KU.
请参阅 数据手册 以查看完整引脚配置。
典型应用
ADS774KU 适用于 6 应用s: Industrial Sensor Acquisition, Process Control Monitoring, Laboratory Data Acquisition, Embedded Control Systems, Sensor Signal Conditioning, Legacy Interface Replacement.
Industrial Sensor Acquisition
The ADS774KU fits industrial sensor-acquisition channels that require a compact, self-contained 12-bit SAR ADC. Its internal sampling circuit, reference, clock, and byte-wide parallel interface reduce the number of external analog and timing components, while the 125 kSPS maximum rate supports acquisition of moderately fast process variables. Place the converter close to the sensor or conditioning network, and select an input buffer and acquisition components that settle the ADC input within the manufacturer-defined acquisition window.
推荐
Process Control Monitoring
ADS774KU is appropriate for pressure, temperature, level, and other slow-to-medium-speed process measurements where 12-bit resolution is useful and parallel data can be captured by embedded control logic. The 125 kSPS maximum conversion rate permits rapid sequential channel updates, and the internal reference and clock simplify deterministic measurement channels. Design the analog input network for the required source impedance and avoid routing high-current digital return paths beneath the analog input or reference connections.
推荐
Laboratory Data Acquisition
The ADS774KU supports laboratory and instrumentation designs requiring repeated analog measurements with a processor-readable digital result. Its 12-bit SAR converter, 125 kSPS maximum sampling rate, internal sampling network, and 8.5 microsecond maximum conversion time provide a useful combination of speed and integration. For instrumentation-grade results, account for input noise, reference performance, grounding, calibration, and the acquisition interval needed by the source rather than treating the maximum conversion rate as the complete system throughput.
推荐
Embedded Control Systems
ADS774KU can serve as the acquisition front end in a legacy or parallel-bus embedded controller because it provides a byte-wide parallel output alongside an internal reference, clock, and sampling network. The interface supports direct microprocessor reads, while the 28-pin SOIC package is practical for established through-hole-to-surface-mount board redesigns. Firmware must account for the required conversion-start, acquisition, busy, and read timing defined by the manufacturer datasheet.
推荐
Sensor Signal Conditioning
The ADS774KU is suitable for digitizing conditioned outputs from resistive, bridge, and low-level voltage sensors when a 12-bit result is sufficient. Internal sampling removes the need for a separate sample-and-hold stage in most applications, while the single +5 V supply and parallel output simplify mixed analog-digital implementation. Select the amplifier, protection network, and input-series resistance together so the source settles accurately before each conversion and transient protection does not degrade the required signal bandwidth.
推荐
Legacy Interface Replacement
ADS774KU supports design continuity for boards originally built around the ADC574, ADC674, or ADC774 families because the manufacturer identifies it as a drop-in replacement in most applications. The integrated sampling network, internal reference and clock, CMOS implementation, and single +5 V operation can simplify replacement of older complete data-converter assemblies. Before substituting it into an existing design, verify pin-level functions, input polarity, acquisition timing, bus timing, supply sequencing, and any legacy external sample-and-hold components.
推荐
推荐产品汇总
工程参考数据： ADS774KU ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | ADS774JU/1K | ADS774HIBDW | ADS774HIDW |
|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 28-pin SOIC (DW) | 28-pin SOIC - same | 28-pin SOIC - same | 28-pin SOIC - same |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit |
| Architecture | Successive approximation (SAR) | Successive approximation (SAR) | Successive approximation (SAR) | Successive approximation (SAR) |
| Number of Channels | 1 | 1 | 1 | 1 |
| Input Type | Single-ended | Single-ended | Single-ended | Single-ended |
| Maximum Sampling Rate | 125 kSPS | 117 kSPS | 117 kSPS | 117 kSPS |
| Output Interface | Byte-wide parallel | Byte-wide parallel | Parallel | Parallel |
关键差异点
- Higher maximum conversion rate within the same ADS774 family （对比 ADS774JU/1K)
- Faster maximum sampling rate than the documented HI-grade successor （对比 ADS774HIBDW)
- Faster maximum sampling rate with the same package and interface class （对比 ADS774HIDW)
设计说明
Treat the analog input path as a settling network rather than a direct connection. Select the source impedance, series resistance, and acquisition duration so the external network charges the ADC sampling capacitor to the required accuracy within the acquisition window defined by the manufacturer datasheet. Keep the analog trace short, minimize parasitic capacitance, and place any input-series or filter components close to the converter.
Separate analog input and reference routing from the byte-wide digital output bus. Use a continuous ground reference beneath the analog section where the package and board design permit, keep bypass connections short, and route converter-control signals away from sensitive input nodes. Check the package pin assignment and recommended layout directly in the manufacturer datasheet before finalizing tracks and component placement.
Do not base system throughput solely on the 125 kSPS headline rate. The usable rate also depends on acquisition time, conversion completion, bus-read timing, and processor service time. When replacing older ADC574-, ADC674-, or ADC774-based assemblies, verify input polarity, pin functions, control timing, output coding, supply requirements, and any external sample-and-hold components.
合规信息
The product comparison identifies ADS774KU as RoHS compliant. Other environmental and material-compliance fields are not established by the available catalog information.