CD4017BE - CMOS Decade Counter/Divider, 16-PDIP | Texas Instruments
料号： CD4017BE ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $0.66 | $0.66 |
| 10 | $0.56 | $5.60 |
| 100 | $0.43 | $43.00 |
| 500 | $0.35 | $175.00 |
| 1,000 | $0.3 | $300.00 |
CD4017BE 概述
A decade counter/divider is a sequential logic circuit that counts clock pulses from 0 to 9 and then repeats, producing one decoded output pulse per count. Each of the 10 decoded outputs goes high in sequence, which makes the CD4017 useful as a one-of-N selector, a sequencer, or a frequency divider. In the broader hierarchy it belongs to the CMOS 4000 family of logic ICs, the standard for low-power, wide-supply-range digital functions. The "BE" suffix on TI parts denotes the plastic DIP package and the standard CMOS process.
Key features of the CD4017BE include fully static operation (no minimum clock), typical operation up to 10 MHz at VDD = 10 V, medium-speed performance at 5 V and 10 V parametric ratings, low quiescent current tested at 20 V, and standardized symmetrical output characteristics. The output stage can source or sink several milliamps per pin, sufficient to drive LEDs directly in hobby circuits when current-limited by a series resistor. An active-high clock enable pin and a master reset (active-high) pin provide flexible control over counting and clearing.
Architecturally, the CD4017 uses a 5-bit Johnson counter feeding a one-of-10 decoder. The Johnson-counter topology eliminates the race and glitch hazards associated with asynchronous ripple counters, because each stage is clocked synchronously. The carry-out signal goes high during counts 0-4 and low during 5-9, allowing two CD4017s to be cascaded to form a 100-state counter without external gating.
Typical applications include LED chasers and running-light displays, frequency division, sequential timing, keypad scanning, and event counters. The wide 3 V to 18 V supply range lets designers power it directly from a 9 V battery, a 12 V rail, or a regulated 5 V logic supply without level shifting. The decoded outputs eliminate the need for an external binary-to-decimal decoder such as the CD4028, saving board space and cost.
Design considerations for the CD4017 include input signal rise/fall time (slow edges near the clock threshold can cause double-counting), proper bypassing of VDD with a 100 nF ceramic capacitor close to the supply pin, and limiting LED current to the Absolute Maximum ratings when driving displays. Inputs must be brought below 0.5*VDD for a logic low and above 0.5*VDD for a logic high for reliable operation across the supply range.
This page synthesizes distributor pricing from DigiKey, Mouser, and LCSC, plus cross-reference equivalents such as MC14017BCP and HCF4017BE drawn from JEDEC-registered CMOS 4000-series second sources - information not consolidated on the manufacturer datasheet alone.
直接替换替代料： CD4017BE ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： CD4017BE （相同外形与封装尺寸） ——差异在于 Logic Family, Mounting Type, Operating Temperature, RoHS Status, Trigger Type.
快速对比工具——选择替代料号进行并排对比：
CD4017BE
✅ 直接替换✓ 有现货
$0.3 / 个
查看数据手册 →MC14017BCP
✅ 直接替换📋 参考替代料（不在目录中）
HCF4017BE
✅ 直接替换📋 参考替代料（不在目录中）
CD4017BCN
✅ 直接替换📋 参考替代料（不在目录中）
HEF4017BP
✅ 直接替换📋 参考替代料（不在目录中）
CD4017BE_HGSEMI
✅ 直接替换📋 参考替代料（不在目录中）
CD4017BE 最大额定值与电气特性
| 功能 | Counter, Decade (divide-by-10) with 10 decoded outputs |
| Logic Family | CMOS 4000B series |
| Number of Elements | 1 |
| Number of Bits per Element | 10 |
| Count Direction | Up |
| Trigger Type | Positive edge |
| Supply Voltage (VDD) | 3 V to 18 V |
| Typical Clock Frequency | 10 MHz (typ) at VDD = 10 V |
| 静态电流 | 100% tested at 20 V (per datasheet) |
| Number of Decoded Outputs | 10 (Q0 through Q9) |
| Carry Out (CO) Signal | Yes - for cascading |
| Master Reset | Yes (active-high) |
| Clock Enable | Yes (active-low enable) |
| 工作温度 | -55C to +125C |
| 封装 | 16-Pin PDIP (N) |
| 安装类型 | Through-hole |
| RoHS 状态 | Compliant (TI product) |
| JEDEC Standard | Meets JEDEC Tentative Standard No. 13A (per datasheet reference) |
CD4017BE 引脚配置
| 引脚 1 | Q5 — Decoded output 5 (active high) |
| 引脚 2 | Q1 — Decoded output 1 (active high) |
| 引脚 3 | Q0 — Decoded output 0 (active high) |
| 引脚 4 | Q2 — Decoded output 2 (active high) |
| 引脚 5 | Q6 — Decoded output 6 (active high) |
| 引脚 6 | Q7 — Decoded output 7 (active high) |
| 引脚 7 | Q3 — Decoded output 3 (active high) |
| 引脚 8 | VSS — Ground (0 V) |
| 引脚 9 | Q8 — Decoded output 8 (active high) |
| 引脚 10 | Q4 — Decoded output 4 (active high) |
| 引脚 11 | Q9 — Decoded output 9 (active high) |
| 引脚 12 | CO — Carry-out (clock divider output for cascading) |
| 引脚 13 | CLOCK INHIBIT — Active-low clock enable (low = enabled) |
| 引脚 14 | CLOCK — Rising-edge clock input |
| 引脚 15 | RESET — Active-high master reset |
| 引脚 16 | VDD — Positive supply voltage (3 V to 18 V) |
典型应用
CD4017BE 适用于 6 应用s: LED Chaser / Running Light Display, Frequency Divider by 10, Sequential Timer / Step Sequencer, Keypad Scanner / Multiplexed Input Selector, Event Counter / Pulse Counter, Hobby / Educational Electronics Projects.
LED Chaser / Running Light Display
The CD4017BE's 10 decoded outputs make it ideal for driving a 10-LED chaser or running-light display, with each Q0-Q9 output going high in sequence on each rising clock edge. Driving 10 LEDs in a circular pattern at, for example, 1 Hz produces a classic 'Knight Rider' style scanner with no microcontroller or firmware required. Each LED is connected through a 330-470 ohm current-limiting resistor to its decoded output pin, with the CD4017BE sinking the LED cathode current. The wide 3-18 V supply range lets the circuit run from a 9 V battery directly, simplifying portable or hobby designs.
推荐
Frequency Divider by 10
The CD4017BE divides the input clock by 10 and presents the divided signal on the carry-out (CO) pin, which transitions once every 10 clock cycles. This makes it useful for generating decade-frequency references, dividing a high-frequency oscillator down to a lower-frequency clock, or building multi-decade frequency dividers. Two CD4017BE devices cascaded divide by 100, three by 1000, etc. For example, a 10 MHz crystal oscillator module driving three cascaded CD4017BEs produces a 10 Hz output - a simple, low-power digital divider with no PLL required.
推荐
Sequential Timer / Step Sequencer
The CD4017BE's 10 decoded outputs enable it to function as a 10-step sequential timer in industrial control, vending machines, or process automation, activating one relay or solenoid per time slot. Each clock pulse advances the active output, so a 1 Hz clock from a CD4060 or 555 timer gives a 1-second-per-step sequence lasting 10 seconds total. The master reset pin allows restart or zeroing the sequence, and the clock inhibit pin lets an external sensor pause the sequence. This eliminates the need for a microcontroller in simple discrete-step control applications.
推荐
Keypad Scanner / Multiplexed Input Selector
The CD4017BE's decoded outputs make it useful as a one-of-10 scan selector for scanning a 10-key keypad or multiplexing 10 input sources into a single ADC channel. The Q0-Q9 outputs sequentially enable one row of the keypad at a time, and the resulting column data is read by a microcontroller or counter. This reduces MCU pin count from 10 to 4 (clock, reset, plus 2-3 column inputs). The decoded outputs also serve as analog multiplexers when connected to the control inputs of analog switches such as the CD4066 or CD4051.
推荐
Event Counter / Pulse Counter
The CD4017BE can be used as a simple event or pulse counter that advances on each input pulse, producing 10 sequential output pulses that can be counted by an external MCU or visualized on LEDs. For applications requiring more than 10 counts, two CD4017BE devices are cascaded: the CO (carry-out) of the first drives the clock input of the second, producing a 0-99 counter. The master reset allows the counter to be zeroed at any time, and the clock inhibit pin lets external logic gate counting on or off.
推荐
Hobby / Educational Electronics Projects
The CD4017BE is one of the most popular ICs in hobby and educational electronics because of its through-hole DIP package (easy breadboarding), wide supply range (works with 9 V batteries and 5 V logic), and intuitive operation. Combined with a 555 timer clock, it forms the basis of dozens of classic beginner projects: LED chasers, electronic dice, binary counters, traffic-light simulators, and reaction-time games. The decoded-output architecture is easier for beginners to understand than binary counters, because each count lights a single labeled output rather than requiring binary-to-decimal decoding.
推荐
推荐产品汇总
工程参考数据： CD4017BE ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MC14017BCP | HCF4017BE | CD4017BCN | HEF4017BP | CD4017BE_HGSEMI |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | onsemi | STMicroelectronics | onsemi | NXP Semiconductors | HGSEMI |
| Package | 16-PDIP | 16-PDIP | 16-PDIP | 16-PDIP | 16-PDIP | 16-PDIP |
| Function | Decade counter / divider (10 outputs) | Decade counter / divider (10 outputs) | Decade counter / divider (10 outputs) | Decade counter / divider (10 outputs) | Decade counter / divider (10 outputs) | Decade counter / divider (10 outputs) |
| Supply Voltage Range | 3 V to 18 V | 3 V to 18 V | 3 V to 18 V | 3 V to 18 V | 3 V to 18 V | 3 V to 18 V |
| Logic Family | CMOS 4000B | CMOS 4000B (MC14xxxB series) | CMOS 4000B | CMOS 4000B | CMOS 4000B | CMOS 4000B |
| Approx Unit Price (qty 1, as of 2026-10-14) | $0.66 | ~$0.55 | ~$0.60 | ~$0.45 | ~$0.70 | $0.07 |
关键差异点
- Industry-standard JEDEC CMOS 4000B compliance with multiple second sources （对比 MC14017BCP (onsemi))
- Wide 3 V to 18 V supply range vs limited 5 V-only logic （对比 74HC4017 (TTL/CMOS hybrid 74HC family))
- Through-hole 16-PDIP package ideal for hobby, breadboarding, and repair （对比 CD4017BPW (TSSOP-16 surface-mount))
- Decoded outputs eliminate need for external BCD-to-decimal decoder （对比 CD4510BE (BCD counter, requires CD4028 decoder))
设计说明
Decouple VDD (pin 16) with a 100 nF ceramic capacitor placed as close to the IC pins as possible, plus a bulk electrolytic (1-10 uF) if the supply is shared with other switching loads. The CD4017BE draws very low quiescent current (microamps) at low clock rates but supply current rises with clock frequency and load capacitance. Adding the decoupling cap prevents logic errors caused by supply droop during clock transitions in noisy digital environments.
Keep clock and reset rise/fall times below 1 us when operating above 1 MHz, because the CD4017BE samples clock edges with a Schmitt-trigger input but slow edges near the threshold can cause double-counting or metastability. If the clock source is a 555 timer or RC network with slow edges, add a Schmitt-trigger buffer (CD40106 / 74HC14) between the source and the CD4017BE clock pin. Similarly, debounce any mechanical switch used as the clock source with an RC + Schmitt-trigger network.
Do not leave the master reset (pin 15) or clock inhibit (pin 13) floating - tie them to inactive states through a pull-up or pull-down resistor. Pin 15 reset is active HIGH, so tie it to VSS (logic low) for normal counting; pin 13 clock inhibit is active LOW, so tie it to VSS for enabled counting. Floating inputs on CMOS logic can drift to mid-supply, causing unpredictable behavior or excessive supply current. Also, the absolute maximum VDD is 20 V per the datasheet - never exceed this even briefly.
For LED-driving applications, calculate LED current to stay within output sink/source ratings. The CD4017BE outputs can typically sink or source several milliamps per pin at 5 V VDD, but at 3 V VDD the drive current is much lower. Always use a current-limiting resistor (typically 330-1000 ohm depending on LED forward voltage and supply) in series with each LED. If higher LED current is needed, buffer the CD4017BE outputs with a transistor driver (2N2222, ULN2003A) rather than exceeding the IC's absolute maximum output current.
合规信息
RoHS and REACH compliance per TI product page; lead-free matte-tin finish. Not AEC-Q100 qualified (this is a logic IC, not an automotive-specific part). Halogen-free status not explicitly listed in provided data - confirmed unknown.
