CS5534-ASZ - 24-Bit 4-Ch Delta-Sigma ADC | Cirrus Logic
料号： CS5534-ASZ ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $10.64 | $10.64 |
| 10 | $9.9 | $99.00 |
| 100 | $8.95 | $895.00 |
| 500 | $8.2 | $4,100.00 |
| 1,000 | $7.6 | $7,600.00 |
CS5534-ASZ 概述
A delta-sigma ADC is a type of analog-to-digital converter that oversamples the input signal and applies noise-shaping and digital decimation filtering to achieve very high resolution, typically 16 to 24 bits. In the signal-chain hierarchy, it sits between analog front-end conditioning and digital processing, and is the preferred converter topology when measuring low-level, low-bandwidth signals such as load-cell and bridge-sensor outputs where microvolt-level resolution matters more than sampling speed.
The CS5534-ASZ belongs to the CS5531/32/33/34 family, which uses charge-balance delta-sigma techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. Its headline differentiators are the ultra-low-noise PGIA front end, four differential input channels, and self-calibration capability, which together eliminate the need for a separate external instrumentation amplifier and reduce system noise floor and drift. The part supports both unipolar and bipolar low-level signals.
According to the Cirrus Logic product page, the family is optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applications. The 24-bit conversion resolution and selectable data rates up to 3.84 kSPS make the CS5534-ASZ well suited to multi-channel load-cell digitization, pressure and temperature scanning in industrial process control, and precision biomedical signal acquisition.
When designing with this device, budget for adequate analog supply decoupling and a clean reference voltage, since the effective resolution of a 24-bit converter is ultimately limited by reference noise, layout, and input settling rather than by the converter itself. The digital SPI interface simplifies isolation in industrial environments.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design guidance not found in a single manufacturer document.
直接替换替代料： CS5534-ASZ ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： CS5534-ASZ （相同外形与封装尺寸） ——差异在于 Number of Input Channels, Package, Interface, Calibration, Resolution.
快速对比工具——选择替代料号进行并排对比：
CS5532-ASZ
✅ 直接替换✓ 有现货
$9.85 / 个
查看数据手册 →CS5533-ASZ
✅ 直接替换✓ 有现货
$2.25 / 个
查看数据手册 →CS5531-ASZ
✅ 直接替换✓ 有现货
$3.98 / 个
查看数据手册 →CS5534-BSZ
✅ 直接替换✓ 有现货
联系询价
查看数据手册 →CS5532-BSZ
✅ 直接替换✓ 有现货
$4.03 / 个
查看数据手册 →CS5534-ASZ 最大额定值与电气特性
| 分辨率 | 24 bit |
| Number of Input Channels | 4 differential |
| Conversion Type | Delta-Sigma (charge-balance) |
| 采样率 | 3.84 kSPS |
| Front End | Integrated ultra-low-noise PGIA |
| Input Signal Type | Unipolar or bipolar low-level |
| 接口 | SPI-compatible serial |
| 封装 | 24-SSOP (5.30 mm width) |
| 安装类型 | Surface Mount |
| Calibration | Self-calibration and system calibration |
| Family | CS5531/32/33/34 (24-bit: CS5532/34; 16-bit: CS5531/33) |
| Typical Applications | Weigh scale, process control, scientific, medical |
| RoHS 状态 | unknown |
CS5534-ASZ 24-ssop (5.30 mm width) 引脚配置指南
CS5534-ASZ（24-ssop (5.30 mm width) 封装）的引脚配置。 该模拟元件具有输入、输出和电源引脚。请参阅制造商数据手册以了解失调调零、补偿和使能引脚配置。适用于信号调理和放大器电路。
暂无详细引脚数据： CS5534-ASZ.
请参阅 数据手册 以查看完整引脚配置。
典型应用
CS5534-ASZ 适用于 6 应用s: Weigh Scale and Load Cell Digitization, Industrial Process Control, Scientific Instrumentation, Medical and Biomedical Signal Acquisition, Multi-Channel Data Acquisition Systems, Precision Sensor Bridge Measurement.
Weigh Scale and Load Cell Digitization
The CS5534-ASZ is explicitly optimized by Cirrus Logic for weigh scale applications, and its integrated ultra-low-noise PGIA directly digitizes microvolt-level load-cell bridge outputs without a separate external instrumentation amplifier. The 24-bit resolution resolves fractions of a microvolt, and the self-calibration feature cancels offset and gain drift that would otherwise shift zero and span readings over temperature. With four differential channels, one CS5534-ASZ can digitize multiple load cells or a scale platform plus reference cell. Placed immediately after the bridge excitation network with clean analog supplies and a low-noise voltage reference, the converter's 3.84 kSPS rate is far above the sub-100 Hz bandwidth of mechanical weighing signals, so heavy oversampling and the on-chip digital filter maximize effective resolution.
推荐
Industrial Process Control
In process control systems, the CS5534-ASZ digitizes low-level signals from pressure transducers, RTD bridges, and thermocouple-conditioning front ends where resolution and drift dominate measurement error budgets. The charge-balance delta-sigma architecture rejects line-related noise, and system calibration allows the converter to absorb front-end offsets introduced by wiring and multiplexed sensors. Four differential channels enable scanning several process variables with a single converter, and the SPI-compatible serial interface makes galvanic isolation via optocouplers or digital isolators straightforward in electrically noisy plant environments. Because industrial 4-20 mA and sensor loops evolve slowly, the 3.84 kSPS maximum rate is ample, and the designer can trade data rate for noise performance in the configuration register.
推荐
Scientific Instrumentation
Scientific instruments measuring low-level unipolar or bipolar signals benefit from the CS5534-ASZ's combination of 24-bit resolution, integrated PGIA, and programmable gain, which lets one device span a wide dynamic range from microvolt thermoelectric signals to larger bridge outputs. Charge-balance delta-sigma conversion provides inherently linear, monotonic transfer behavior valued in laboratory data acquisition, and self-calibration supports long unattended measurement campaigns. The four differential inputs support multi-point experiments from a single converter, while the serial interface integrates cleanly with microcontroller-based instrument control. Because the effective resolution of a 24-bit converter is limited by reference noise and layout, scientific users should pair the CS5534-ASZ with a precision, low-noise voltage reference and careful analog grounding.
推荐
Medical and Biomedical Signal Acquisition
The Cirrus Logic CS5531/32/33/34 family is listed for medical applications, and the CS5534-ASZ's 24-bit resolution and ultra-low-noise PGIA suit low-frequency biomedical measurements such as bridge-based pressure catheters, strain-gauge transducers, and precision temperature monitoring in patient-connected equipment. The differential inputs provide common-mode rejection essential when measuring microvolt signals in the presence of 50/60 Hz mains interference, and the delta-sigma architecture's line rejection further suppresses this interference. Low signal bandwidths in biomedical applications align well with the 3.84 kSPS ceiling, permitting deep oversampling. Designers of patient-connected systems must additionally address isolation and leakage-current requirements at the system level, which the digital serial interface facilitates.
推荐
Multi-Channel Data Acquisition Systems
With four differential input channels in a single 24-SSOP package, the CS5534-ASZ consolidates a multi-sensor front end that would otherwise require multiple converters or external multiplexers. Each channel benefits from the integrated PGIA and self-calibration, and channel selection plus gain are configured through the SPI port under software control. This makes the part attractive for distributed I/O modules, test fixtures, and monitoring nodes where board area and BOM count matter. Designers should observe input-settling requirements after channel or gain changes so the digital filter output reflects the newly selected sensor rather than residual charge from the previous channel; sequencing at modest rates yields the best effective resolution across all four channels simultaneously.
推荐
Precision Sensor Bridge Measurement
Beyond weigh scales, the CS5534-ASZ excels with any Wheatstone-bridge sensor, including pressure transducers, torque sensors, and magnetic-field bridges, because the PGIA input stage presents a differential, gain-programmable interface matched to bridge output impedance and common-mode range. The converter's 24-bit resolution resolves bridge output changes in the microvolt region, and offset/gain calibration performed at power-up or periodically removes bridge imbalance drift. Unipolar or bipolar signal polarity is supported per the family description, accommodating both single-supply and split-supply bridge excitation schemes. For best results, use a ratiometric reference connection so reference drift cancels from the measurement, and keep the analog ground plane quiet beneath the converter.
推荐
推荐产品汇总
工程参考数据： CS5534-ASZ ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | CS5532-ASZ | CS5533-ASZ | CS5531-ASZ | CS5534-BSZ | CS5532-BSZ |
|---|---|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Package | 24-SSOP (5.30 mm) | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same | SSOP-24 - same | SSOP-24 - same |
| Resolution | 24 bit | 24 bit | 16 bit | 16 bit | 24 bit | 24 bit |
| Input Channels | 4 differential | 2 differential | 4 differential | 2 differential | 4 differential | 2 differential |
| Sampling Rate | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS |
| PGIA Front End | Yes (ultra-low-noise) | Yes | Yes | Yes | Yes | Yes |
| Interface | SPI-compatible serial | SPI-compatible serial | SPI-compatible serial | SPI-compatible serial | SPI-compatible serial | SPI-compatible serial |
| Primary Use Case | 4-channel weigh scale / process control | 2-channel weigh scale | 4-channel cost-reduced | 2-channel cost-reduced | Alternate-grade 4-channel | Alternate-grade 2-channel |
关键差异点
- Four differential channels with integrated PGIA （对比 CS5532-ASZ)
- Full 24-bit resolution （对比 CS5533-ASZ)
- Ultra-low-noise PGIA eliminates external amplifier （对比 Generic 24-bit delta-sigma ADCs (ADS124S08, AD7124-8))
设计说明
As with all 24-bit delta-sigma converters, the achievable effective resolution is set by layout and reference quality, not the converter silicon alone. Place the CS5534-ASZ over a continuous analog ground plane, keep the differential input traces short and symmetric, and guard the AIN traces from digital SCLK/SDO lines. Decouple VA+, VD, and the voltage reference with 100 nF ceramic capacitors placed within a few millimeters of each pin, backed by bulk 10 uF capacitance on the analog rail.
Noise on the voltage reference appears directly in the conversion result multiplied by the PGIA gain, so select a low-noise precision reference and decouple its output at the CS5534 pin. Consider a ratiometric connection for bridge sensors, where the same excitation source drives the bridge and the reference input; excitation drift then cancels from the measurement. Run the self-calibration routine after power-up and after significant temperature change to remove offset and gain errors.
After switching input channels or changing PGIA gain, allow the input and filter to settle before reading data; reading immediately after a channel change yields data contaminated by the previous channel. Also verify that low-level bipolar input signals remain within the selected gain range's common-mode and differential input limits. When isolating the SPI bus for industrial use, account for isolator propagation delay at the SCLK rate used.
合规信息
Retrieved distributor snippets do not state RoHS/REACH status; verify on the Cirrus Logic CS5531/32/33/34 product page or certificate of conformance before use in compliant BOMs.
