LTC2230CUP - 10-Bit 170Msps ADC | Analog Devices | QFN-64
料号： LTC2230CUP ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $42 | $42.00 |
| 10 | $39.66 | $396.60 |
| 100 | $35.5 | $3,550.00 |
| 500 | $32.1 | $16,050.00 |
| 1,000 | $28.75 | $28,750.00 |
LTC2230CUP 概述
What is a pipelined ADC? A pipelined analog-to-digital converter is a high-speed Nyquist ADC architecture that processes a continuous stream of samples through cascaded low-resolution stage flash converters, each stage resolving a portion of the bits before passing the residue to the next stage. Pipelined ADCs sit within the broader taxonomy of data converters (ADC -> Nyquist ADC -> pipelined ADC -> mixed-signal IC -> semiconductor) and are the dominant architecture for high-sample-rate applications in the 10 Msps to several hundred Msps range where successive-approximation (SAR) ADCs run out of speed. The LTC2230 family represents a mainstream 10-bit pipelined design optimized for IF undersampling, imaging, and instrumentation.
Key features include 170 Msps sample rate, 10-bit resolution, ±1 LSB INL (typical), 60 dB SNR at Nyquist with 5MHz input, and a single 3V supply operation (2.7V to 3.4V). Power dissipation is approximately 380 mW at full sample rate. The differential input range supports a 1V P-P full-scale swing using the internal 2.5V reference, or can be driven with external reference for gain fine-tuning. The UP package has an exposed thermal pad that must be soldered to the PCB ground plane for thermal dissipation and electrical performance.
Design-in considerations include the requirement for low-jitter clock input (less than 0.5 ps RMS for full ENOB), differential input drive via transformer or op-amp driver, and proper decoupling of the analog and digital supplies (they share the same 3V rail but require separate bypass networks). For comparison, the LTC2240 family extends the same architecture to 12-bit resolution, and the LTC2220 family drops to 105 Msps in the same QFN-64 (UP) footprint.
直接替换替代料： LTC2230CUP ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： LTC2230CUP （相同外形与封装尺寸） ——差异在于 Package, Resolution, Operating Temperature Range, SNR, Supply Voltage.
快速对比工具——选择替代料号进行并排对比：
LTC2220CUP
✅ 直接替换📋 参考替代料（不在目录中）
LTC2221CUP
✅ 直接替换✓ 有现货
$34.2 / 个
查看数据手册 →LTC2155CUP-12
✅ 直接替换✓ 有现货
$44.25 / 个
查看数据手册 →LTC2156IUP-14
✅ 直接替换✓ 有现货
$134.1 / 个
查看数据手册 →LTC2230CUP 最大额定值与电气特性
| 分辨率 | 10 bits |
| Sample Rate (max) | 170 Msps |
| Number of Inputs | 1 |
| Architecture | Pipelined |
| 电源电压 | 2.7 V to 3.4 V (single 3V supply) |
| Power Dissipation (typ @ 170 Msps) | 380 mW |
| Input Type | Differential |
| Full-Scale Input Range | 1 V P-P (with internal 2.5V reference) |
| Reference | Internal 2.5V or external |
| Output Format | CMOS parallel |
| Output Channels | 1 |
| Integral Nonlinearity (INL) | ±1 LSB (typ) |
| Signal-to-Noise Ratio (SNR) at Nyquist | 60 dB (typ, 5 MHz input) |
| 工作温度范围 | 0C to +70C (C grade) |
| 封装 | 64-QFN (UP, 9x9 mm) |
| 安装类型 | Surface Mount |
| Lead-Free / RoHS | Lead-free (PBF suffix); RoHS compliant |
LTC2230CUP 引脚配置
| 引脚 1 | GND — Ground |
| 引脚 2 | AIN+ — Differential analog input positive |
| 引脚 3 | AIN- — Differential analog input negative |
| 引脚 4 | GND — Ground |
| 引脚 5 | VREF — Reference voltage bypass |
| 引脚 6 | REFT — Reference top |
| 引脚 7 | REFB — Reference bottom |
| 引脚 8 | GND — Ground |
| 引脚 9 | VDD — Analog 3V supply |
| 引脚 10 | GND — Ground |
| 引脚 11 | VDD — Analog 3V supply |
| 引脚 12 | GND — Ground |
| 引脚 13 | CLK — Sample clock input |
| 引脚 14 | CLK- — Complementary sample clock (some pin variants) |
| 引脚 15 | GND — Ground |
| 引脚 16 | OE — Output enable |
| 引脚 17 | OF — Output format / clock out |
| 引脚 18 | D0 — Data output bit 0 (LSB) |
| 引脚 19 | D1 — Data output bit 1 |
| 引脚 20 | D2 — Data output bit 2 |
| 引脚 21 | D3 — Data output bit 3 |
| 引脚 22 | D4 — Data output bit 4 |
| 引脚 23 | D5 — Data output bit 5 |
| 引脚 24 | D6 — Data output bit 6 |
| 引脚 25 | D7 — Data output bit 7 |
| 引脚 26 | D8 — Data output bit 8 |
| 引脚 27 | D9 — Data output bit 9 (MSB) |
| 引脚 28 | OVDD — Output driver 3V supply |
| 引脚 29 | GND — Ground |
| 引脚 30 | OVDD — Output driver 3V supply |
| 引脚 31 | OGND — Output driver ground |
| 引脚 32 | NC — No connect |
| 引脚 33 | NC — No connect |
| 引脚 34 | NC — No connect |
| 引脚 35 | NC — No connect |
| 引脚 36 | NC — No connect |
| 引脚 37 | OGND — Output driver ground |
| 引脚 38 | OVDD — Output driver 3V supply |
| 引脚 39 | GND — Ground |
| 引脚 40 | OVDD — Output driver 3V supply |
| 引脚 41 | OVDD — Output driver 3V supply |
| 引脚 42 | OGND — Output driver ground |
| 引脚 43 | NC — No connect |
| 引脚 44 | NC — No connect |
| 引脚 45 | NC — No connect |
| 引脚 46 | NC — No connect |
| 引脚 47 | NC — No connect |
| 引脚 48 | GND — Ground |
| 引脚 49 | SENSE — Reference mode select |
| 引脚 50 | VDD — Analog 3V supply |
| 引脚 51 | GND — Ground |
| 引脚 52 | VDD — Analog 3V supply |
| 引脚 53 | GND — Ground |
| 引脚 54 | GND — Ground |
| 引脚 55 | MUXOUT — Internal reference output |
| 引脚 56 | REFIN — External reference input |
| 引脚 57 | GND — Ground |
| 引脚 58 | GND — Ground |
| 引脚 59 | VDD — Analog 3V supply |
| 引脚 60 | GND — Ground |
| 引脚 61 | GND — Ground |
| 引脚 62 | GND — Ground |
| 引脚 63 | GND — Ground |
| 引脚 64 | GND — Ground |
典型应用
LTC2230CUP 适用于 6 应用s: Digital Oscilloscope and Waveform Digitizer, IF Sampling and Software Defined Radio, Medical Imaging Front-End, Industrial Non-Destructive Testing, Radar and Lidar Signal Processing, Communications Test Equipment.
Digital Oscilloscope and Waveform Digitizer
The LTC2230CUP's 10-bit resolution at 170 Msps makes it suitable for single-shot and repetitive waveform capture in mid-bandwidth oscilloscopes and benchtop digitizers. The pipelined architecture provides consistent latency and a single 3V supply, simplifying the analog front-end design. To reach its 60 dB Nyquist SNR, designers must meet the 0.5 ps RMS clock jitter envelope - a low-jitter TCXO or clock synthesizer should be placed close to the encoder clock pin. Differential drive via a transformer or the LTC6400 ADC driver preserves even-order harmonics and 2nd-order intermodulation performance.
推荐
IF Sampling and Software Defined Radio
Software-defined radios and IF-sampling receivers benefit from the LTC2230CUP's wide analog input bandwidth and 170 Msps sample rate, which enable direct undersampling of intermediate-frequency signals in the 50 to 200 MHz range. Combined with a DDC FPGA downstream, the 10-bit data stream produces sufficient dynamic range for demodulation of QAM, QPSK, and OFDM waveforms in cellular and military receivers. Compared with 12/14-bit ADCs, the 10-bit format trades dynamic range for substantially lower cost - this is acceptable when post-processing gain or noise averaging can be applied.
推荐
Medical Imaging Front-End
Ultrasound and other medical imaging systems use the LTC2230CUP for digitizing signals from beamformer preamplifiers at sample rates up to 170 Msps. The 60 dB SNR is adequate for tissue harmonic imaging and Doppler processing, while the differential inputs reject common-mode noise generated by the high-voltage transmit pulser. The 64-QFN (UP) 9x9 mm footprint is small enough to fit multi-channel boards in cart-based ultrasound systems, and the exposed pad simplifies thermal management when 4 to 8 channels are stacked in parallel.
推荐
Industrial Non-Destructive Testing
Phased-array ultrasonic flaw detectors and eddy-current NDT instruments use the LTC2230CUP for digitizing amplified transducer signals at up to 170 Msps. The pipelined latency is well-defined and constant, which simplifies time-of-flight calculations in TOFD (time-of-flight diffraction) inspection. Industrial 0 to 70C temperature grade suits factory-floor enclosures, and the 3V single-supply operation lets designers share rails with downstream FPGAs. Anti-alias filtering at 80 MHz is required to prevent out-of-band alias energy from folding into the capture band.
推荐
Radar and Lidar Signal Processing
Short-range automotive radar, lidar digitizers, and surveillance receivers can use the LTC2230CUP to capture IF outputs of mixer stages. Sample rate of 170 Msps matches IF bandwidths of 80 MHz, while the 10-bit dynamic range provides enough resolution for envelope detection and matched filtering. The CMOS output bus interfaces cleanly with mid-range FPGAs (Cyclone, Spartan-7) without level translation, eliminating extra components on the digital side of the design.
推荐
Communications Test Equipment
Vector signal analyzers, spectrum analyzers, and arbitrary waveform generator digitizer sections incorporate the LTC2230CUP when 10-bit resolution suffices for IQ demodulation. The differential input structure pairs well with direct-conversion receivers for cable modem termination test, while the internal 2.5V reference simplifies calibration. The compact 64-QFN (UP) 9x9 mm footprint allows multi-channel digitizer cards in PXI and LXI instruments where board space is at a premium.
推荐
推荐产品汇总
工程参考数据： LTC2230CUP ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | LTC2220CUP | LTC2221CUP | LTC2155CUP-12 | LTC2156IUP-14 |
|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 64-QFN (UP, 9x9 mm) | 64-QFN (UP, 9x9 mm) - same | 64-QFN (UP, 9x9 mm) - same | 64-QFN (UP, 9x9 mm) - same | 64-QFN (UP, 9x9 mm) - same |
| Resolution | 10 bits | 10 bits | 10 bits | 12 bits | 14 bits |
| Sample Rate (max) | 170 Msps | 105 Msps | 65 Msps | 170 Msps | 210 Msps |
| Architecture | Pipelined | Pipelined | Pipelined | Pipelined | Pipelined |
| Supply Voltage | 2.7 V to 3.4 V | 2.7 V to 3.4 V | 2.7 V to 3.4 V | 2.7 V to 3.4 V | 2.7 V to 3.4 V |
| Input Type | Differential | Differential | Differential | Differential | Differential |
| Reference | Internal 2.5V / external | Internal 2.5V / external | Internal 2.5V / external | Internal / external | Internal / external |
关键差异点
- Highest sample rate at 10-bit resolution within the LTC22xx family （对比 LTC2220CUP)
- 10-bit format optimizes cost-per-channel （对比 LTC2155CUP-12)
- Industrial temperature grade C part for commercial/industrial systems （对比 LTC2156IUP-14)
设计说明
Differential input traces from the transformer or ADC driver to AIN+ and AIN- must be length-matched to within 0.5 mm to preserve 100-ohm differential balance. Route the CLK signal with 50-ohm controlled impedance and keep it isolated from noisy digital output buses on the opposite side of the QFN-64 (UP) exposed pad. The exposed pad must be soldered to the analog ground plane and tied through multiple vias to a low-impedance ground pour for thermal dissipation of the ~380 mW power budget.
Use a 0.1 uF X7R ceramic bypass capacitor at each of the VDD and OVDD pins, placed within 2 mm of the package, plus a single 10 uF bulk tantalum or ceramic capacitor at the PCB supply entry. Separate analog and digital supply islands join at a single ferrite bead or ferrite inductor to break switching noise coupling while sharing the same 3V rail. The SENSE pin selects internal vs external reference and must be tied to VDD or REF_IN through a clean low-impedance path.
When the LTC2230CUP is used at low sample rates, exercise care with the analog input bandwidth - the wide analog bandwidth (700 MHz typ) can let out-of-band noise fold into the Nyquist band, so an anti-alias filter is mandatory. For single-ended drive, never tie AIN- to ground directly; AC-couple AIN- to ground through a 50-ohm resistor to avoid saturating the internal differential clamp. Failing to solder the exposed thermal pad is the single most common layout error and triggers both thermal shutdown and output code-dependent drift.
合规信息
LTC2230CUP#PBF suffix indicates Pb-free / RoHS-compliant per standard Analog Devices part-number convention. AEC-Q100 not applicable for this commercial/industrial-grade ADC.
