LTC2345CUK-18 - Octal 18-bit 200kSps Diff SoftSpan ADC | ADI
料号： LTC2345CUK-18 ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $38.5 | $38.50 |
| 10 | $35.2 | $352.00 |
| 100 | $30.75 | $3,075.00 |
| 500 | $27.4 | $13,700.00 |
| 1,000 | $24.95 | $24,950.00 |
LTC2345CUK-18 概述
A SoftSpan ADC is a successive approximation converter whose input voltage range can be reconfigured on a per-conversion, per-channel basis via internal programmable gain stages. Within the data-converter hierarchy, SAR ADCs sit between flash converters (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, lower bandwidth). The LTC2345CUK-18 occupies the multi-channel, medium-resolution, low-latency niche where simultaneous acquisition of several signals is required without the latency penalty of sigma-delta.
Key differentiating features include eight truly differential input channels sampled through an 8-channel simultaneous-sampling front end, per-conversion SoftSpan range selection across multiple bipolar and unipolar spans, and an integrated 2.048 V reference with buffer that eliminates external reference components. The QFN-48 (UK suffix) 7x7 mm package with exposed pad provides a low thermal resistance path and compact PCB footprint.
Typical applications include multi-axis industrial process control, multi-channel instrumentation, optical networking power monitoring, and programmable logic controller (PLC) analog front ends. The simultaneous-sampling capability is decisive in phased-array and vibration analysis where channel-to-channel skew would corrupt the measurement. As of 2026-10-13 pricing is held in distributor stock at DigiKey, Mouser, and authorized partners.
When designing with the LTC2345CUK-18, ensure the exposed pad is soldered to a continuous ground plane for thermal dissipation and reference decoupling. Reject NMC pins by tying them to known logic levels per the datasheet, and route the LVDS or SPI traces as 50 ohm controlled-impedance differential lines if LVDS mode is selected.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the standalone manufacturer datasheet.
直接替换替代料： LTC2345CUK-18 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
LTC2345IUK-18#PBF
✅ 直接替换📋 参考替代料（不在目录中）
LTC2345CUK-18#TRPBF
✅ 直接替换📋 参考替代料（不在目录中）
LTC2345IUK-18#TRPBF
✅ 直接替换📋 参考替代料（不在目录中）
LTC2345CUK-18 最大额定值与电气特性
| 分辨率 | 18 bit |
| Number of Channels | 8 (differential) |
| 采样率 | 200 kSps (per channel) |
| ADC Architecture | SAR (Successive Approximation Register) |
| Sampling Type | Simultaneous sampling |
| INL (Integral Non-Linearity) | ±5 LSB |
| No Missing Codes | 18 bits (guaranteed) |
| SNR (Signal-to-Noise Ratio) | 91.8 dB |
| Input Type | Differential, wide common-mode range |
| Input Span (SoftSpan) | Per-conversion, per-channel selectable |
| 电源电压 | 4.75 V to 5.25 V (single 5 V) |
| Reference | Internal 2.048 V with buffer |
| Digital Interface | SPI CMOS (1.8 V to 5 V) or LVDS (pin-selectable) |
| 封装 | 48-lead QFN (7x7 mm) UK suffix, exposed pad |
| 工作温度 | 0C to +70C (C grade) |
| 安装类型 | Surface Mount |
| RoHS 状态 | Compliant (PBF suffix) |
LTC2345CUK-18 引脚配置
| 引脚 1 | IN0+ — Differential analog input channel 0 positive |
| 引脚 2 | IN0- — Differential analog input channel 0 negative |
| 引脚 3 | IN1+ — Differential analog input channel 1 positive |
| 引脚 4 | IN1- — Differential analog input channel 1 negative |
| 引脚 5 | IN2+ — Differential analog input channel 2 positive |
| 引脚 6 | IN2- — Differential analog input channel 2 negative |
| 引脚 7 | IN3+ — Differential analog input channel 3 positive |
| 引脚 8 | IN3- — Differential analog input channel 3 negative |
| 引脚 9 | GND — Analog ground |
| 引脚 10 | REF — Reference voltage (internal 2.048 V) |
| 引脚 11 | REFBUF — Reference buffer output |
| 引脚 12 | GND — Analog ground |
| 引脚 13 | VDD — 5 V analog supply |
| 引脚 14 | GND — Analog ground |
| 引脚 15 | VDD — 5 V analog supply |
| 引脚 16 | GND — Analog ground |
| 引脚 17 | IN4+ — Differential analog input channel 4 positive |
| 引脚 18 | IN4- — Differential analog input channel 4 negative |
| 引脚 19 | IN5+ — Differential analog input channel 5 positive |
| 引脚 20 | IN5- — Differential analog input channel 5 negative |
| 引脚 21 | IN6+ — Differential analog input channel 6 positive |
| 引脚 22 | IN6- — Differential analog input channel 6 negative |
| 引脚 23 | IN7+ — Differential analog input channel 7 positive |
| 引脚 24 | IN7- — Differential analog input channel 7 negative |
| 引脚 25 | GND — Analog ground |
| 引脚 26 | OVDD — Digital interface supply (1.8 V to 5 V) |
| 引脚 27 | GND — Digital ground |
| 引脚 28 | SCK — Serial clock input (SPI/LVDS) |
| 引脚 29 | SDI — Serial data input (SPI configuration) |
| 引脚 30 | SDO — Serial data output |
| 引脚 31 | CS — Chip select (active low, SPI mode) |
| 引脚 32 | CNV — Conversion start input |
| 引脚 33 | BUSY — Conversion busy output |
| 引脚 34 | LVDS/CMOS — Interface mode select pin |
| 引脚 35 | GND — Digital ground |
| 引脚 36 | NC — Not connected (per datasheet) |
| 引脚 37 | NC — Not connected (per datasheet) |
| 引脚 38 | NC — Not connected (per datasheet) |
| 引脚 39 | NC — Not connected (per datasheet) |
| 引脚 40 | NC — Not connected (per datasheet) |
| 引脚 41 | GND — Digital ground |
| 引脚 42 | NC — Not connected (per datasheet) |
| 引脚 43 | NC — Not connected (per datasheet) |
| 引脚 44 | NC — Not connected (per datasheet) |
| 引脚 45 | NC — Not connected (per datasheet) |
| 引脚 46 | NC — Not connected (per datasheet) |
| 引脚 47 | NC — Not connected (per datasheet) |
| 引脚 48 | EP — Exposed pad - thermal/ground (must be soldered to PCB ground plane) |
典型应用
LTC2345CUK-18 适用于 6 应用s: Multi-Channel Industrial Process Control, Optical Networking Power Monitoring, Vibration and Phased-Array Analysis, Multi-Channel Instrumentation, PLC Analog Front End, Medical Multi-Signal Acquisition.
Multi-Channel Industrial Process Control
The LTC2345CUK-18 fits multi-axis industrial process control with eight differential inputs sampled simultaneously, each spanning 0 to 5 V unipolar or ±10 V bipolar via SoftSpan. Its ±5 LSB INL and 91.8 dB SNR deliver the headroom required to resolve 4-20 mA loop signals through a 250 ohm shunt with 16-bit effective precision after calibration. Reject common-mode cycle delay by sampling all eight loops on the same CNV chain simultaneously - critical when downstream loops must produce equal time-stamp. Power-grid and factory PLC deployments use this approach to compress acquisition BOM by replacing 8 single-channel ADCs with 1 octal part.
推荐
Optical Networking Power Monitoring
The LTC2345CUK-18 is well matched to optical networking power monitoring, where bias-tee photodiode currents span from microamps to milliamps across the eight transceiver channels. Its 91.8 dB SNR and 18-bit resolution cover this wide dynamic range without range-switching relays or per-channel PGAs, and simultaneous sampling removes channel-to-channel skew that corrupts per-wavelength power calibration. The integrated 2.048 V reference and buffer eliminate external REF decoupling, simplifying the densely-routed QSFP-DD or OSFP monitor front-end board. Reject common-mode cycle delay by tying the analog and digital grounds with a ferrite bead at the package exposed pad.
推荐
Vibration and Phased-Array Analysis
The LTC2345CUK-18 suits vibration and phased-array analysis through its eight-channel simultaneous sampling, which preserves channel-to-channel phase relationships that sequential ADCs destroy. Reject common-mode cycle delay by sampling all eight accelerometers or hydrophones on the same conversion cycle, with 200 kSps per channel comfortably above the 20 kHz Nyquist for industrial vibration and ultrasonic phased-array work. The pin-selectable LVDS interface maintains signal fidelity over the long board-to-FPGA distances typical of phased-array backplanes, and SoftSpan per-conversion range selection adapts a single device to both low-amplitude accelerometer and high-amplitude geophone channels in the same array.
推荐
Multi-Channel Instrumentation
The LTC2345CUK-18 fits multi-channel instrumentation, including bench-top DMMs, audio analyzers, and scientific data loggers where eight 18-bit channels must operate without channel-to-channel skew. Its 91.8 dB SNR meets the dynamic range required for audio-bandwidth measurements (>=20 kHz full-power bandwidth) and per-conversion SoftSpan allows each channel to be set independently to a 0-5 V, 0-10 V, or ±5 V / ±10 V range without external PGAs. The integrated reference and buffer eliminate thermal drift caused by external reference warm-up, improving the linearity needed for ratiometric measurements. Reject ground bounce by routing SPI/LVDS traces over a continuous ground plane.
推荐
PLC Analog Front End
The LTC2345CUK-18 suits PLC analog front ends where 8 differential channels replace the discrete ADC-plus-multiplexer architecture of legacy designs. Its 200 kSps per channel rate handles 8 channels at the 1 kHz to 10 kHz update rates typical of process-control scan cycles with substantial margin. The pin-selectable SPI CMOS (1.8 V to 5 V) interface connects directly to 3.3 V PLC CPUs without level shifters, while the LVDS option supports isolated front ends via digital isolators. Reject common-mode cycle delay by synchronizing all CNV chain operations to the PLC scan trigger.
推荐
Medical Multi-Signal Acquisition
The LTC2345CUK-18 fits medical multi-signal acquisition such as patient monitors, infusion-pump verification rigs, and electro-physiology front ends where 8 differential channels with 18-bit resolution capture ECG, EEG, EMG, or bio-potential signals with high CMRR. Its simultaneous sampling preserves the millisecond-level timing relationships that bio-signal algorithms depend on, and its 91.8 dB SNR covers the wide dynamic range between micro-volt EEG and milli-volt ECG inputs without range switching. The integrated reference and buffer simplify the IEC 60601-1 isolation barrier by reducing external components. Reject ground loops by isolating the analog front end with a high-CMRR isolation amplifier ahead of the ADC inputs.
推荐
推荐产品汇总
工程参考数据： LTC2345CUK-18 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | LTC2345IUK-18#PBF | LTC2345CUK-18#TRPBF | LTC2345IUK-18#TRPBF |
|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 48-QFN (7x7) UK | 48-QFN (7x7) UK - same | 48-QFN (7x7) UK - same | 48-QFN (7x7) UK - same |
| Resolution | 18 bit | 18 bit | 18 bit | 18 bit |
| Sampling Rate | 200 kSps/ch | 200 kSps/ch | 200 kSps/ch | 200 kSps/ch |
| Channels | 8 differential | 8 differential | 8 differential | 8 differential |
| Operating Temperature | 0C to +70C | -40C to +85C | 0C to +70C | -40C to +85C |
| Digital Interface | SPI CMOS / LVDS | SPI CMOS / LVDS | SPI CMOS / LVDS | SPI CMOS / LVDS |
| Internal Reference | Yes (2.048 V) | Yes (2.048 V) | Yes (2.048 V) | Yes (2.048 V) |
| Packaging Format | Tray | Tray | Tape & Reel | Tape & Reel |
关键差异点
- Octal simultaneous-sampling SAR in a single 48-QFN UK package （对比 Discrete 8x single-channel SAR solutions)
- Per-conversion SoftSpan input range selection （对比 Fixed-range SAR ADCs (e.g. AD7606))
- Pin-selectable SPI CMOS or LVDS interface （对比 SPI-only competitive parts)
- Integrated 2.048 V reference and buffer （对比 External-reference SAR ADCs)
设计说明
Solder the exposed pad (EP, pin 48) of the 48-lead QFN UK package to a continuous ground plane using an array of thermal vias underneath the EP. This provides the low-impedance ground return required by the internal reference and buffer, and conducts dissipated power (~250 mW at full 200 kSps across 8 channels) out of the die. Without proper EP soldering, reference noise and INL degrade noticeably. Place the 10uF X7R bypass caps on VDD and OVDD within 0.1 inch of the respective pins to reject switching noise.
Route the SPI or LVDS digital traces as 50 ohm controlled-impedance differential pairs (LVDS) or 50 ohm single-ended (CMOS) over a continuous ground plane. Keep digital traces away from the analog input pins (IN0+/- through IN7+/-) and the REF/REFBUF pins. If LVDS mode is selected, the 100 ohm differential termination must be placed within 0.5 inch of the LTC2345CUK-18 SDO+/SDO- pins to prevent reflections that would corrupt the 200 kSps data capture. Tie the LVDS/CMOS pin (pin 34) to OVDD or GND before the rising edge of VDD to latch the interface mode at power-up.
Do not exceed the absolute maximum 5.5 V on VDD or OVDD. Do not leave the LVDS/CMOS pin floating - it must be tied to a known logic level (OVDD for LVDS, GND for SPI CMOS) before VDD crosses VDD_min. Do not omit the REFBUF decoupling cap (10uF X7R + 0.1uF NP0 in parallel) - without it, REFBUF noise will degrade SNR below the 91.8 dB datasheet figure. When CNV is held low between conversions, ensure the BUSY output has returned high before reading SDO to avoid data races. Tie all NC pins to known logic levels per datasheet section 'Pin Functions'.
合规信息
RoHS and REACH compliant per the PBF suffix designation (lead-free, RoHS-compliant). AEC-Q100 not qualified - the C grade (commercial 0C to +70C) and I grade (industrial -40C to +85C) are not automotive-qualified; consult Analog Devices for automotive-grade octal SAR options. Halogen-free status not stated in the verified distributor data - confirm with the manufacturer datasheet's materials declaration.
