MK21FN1M0VLQ12 - 120MHz Cortex-M4 MCU, 1MB Flash | NXP
料号： MK21FN1M0VLQ12 ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $15.34 | $15.34 |
| 10 | $13.81 | $138.10 |
| 100 | $12.27 | $1,227.00 |
| 500 | $10.74 | $5,370.00 |
| 1,000 | $9.2 | $9,200.00 |
MK21FN1M0VLQ12 概述
What is a microcontroller? A microcontroller is a single-chip computer that integrates a CPU core, program memory (Flash), data memory (SRAM), and peripheral interfaces into one package. Microcontrollers (MCUs) -> ARM Cortex-M microcontrollers -> Cortex-M4 with FPU -> Kinetis K series -> K21F sub-family. The K21F targets cost-sensitive, low-power, secure-connected applications and is positioned between the K10 (entry) and K60 (USB+Ethernet+high-speed) families within NXP's Kinetis portfolio.
Key features include a Cortex-M4 core with single-precision FPU and DSP instructions, 1MB Flash for application code, 128KB SRAM for data/buffers, Full-Speed USB 2.0 device/host/OTG with on-chip transceiver, hardware AES-128 encryption, secure anti-tamper pins, a 16-bit SAR ADC with up to 24 channels, two 12-bit DACs, and a low-power segment-LCD controller option. The 144-LQFP package exposes all major peripherals for maximum design flexibility.
The MK21FN1M0VLQ12 uses a Cortex-M4 core delivering 1.25 Dhrystone MIPS per MHz, with single-cycle MAC and hardware FPU for DSP workloads. The integrated power management supports multiple low-power modes (Wait, Stop, VLPR, VLPS) and an internal voltage regulator. The 1MB Flash is organized in a dual-bank arrangement for in-application programming and EEPROM emulation. Hardware AES-128 and tamper detection modules protect against software and physical attacks on connected endpoints.
Typical applications include USB-connected industrial control systems, secure point-of-sale (POS) terminals, anti-tamper smart meters, low-power human-machine interfaces (HMI) with segment LCD, consumer medical devices, and home/building automation gateways. The combination of Full-Speed USB, hardware crypto, and low-power Run/Stop modes makes the part especially suited to battery-powered secure peripherals.
When designing with the MK21FN1M0VLQ12, carefully review the decoupling network: place 100nF X7R capacitors as close as possible to every VDD/VSS pair, with bulk 4.7uF X5R near the regulator output. For USB, the D+/D- traces must be 90 ohm differential with no stubs; route over a continuous ground plane. Use the tamper pins to short/lock memory on intrusion, and select the boot mode via the security/boot configuration pins.
This page synthesizes distributor pricing, K21/K22/K24 drop-in and migration alternatives, and practical design notes not found in the manufacturer datasheet, helping engineers select the right Kinetis K2x variant for their USB-connected secure design.
直接替换替代料： MK21FN1M0VLQ12 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： MK21FN1M0VLQ12 （相同外形与封装尺寸） ——差异在于 Package, Mounting Type, ADC, Maximum Clock Frequency, Core.
快速对比工具——选择替代料号进行并排对比：
MK21FN1M0VLQ12R
✅ 直接替换📋 参考替代料（不在目录中）
MK22FN1M0AVLQ12
✅ 直接替换📋 参考替代料（不在目录中）
MK24FN1M0VLQ12
✅ 直接替换📋 参考替代料（不在目录中）
MK22FN1M0VLQ12
✅ 直接替换📋 参考替代料（不在目录中）
MK24FN1M0VLQ12R
✅ 直接替换📋 参考替代料（不在目录中）
MK21FN1M0VLQ12 最大额定值与电气特性
| Core | ARM Cortex-M4 with FPU and DSP |
| Bit Width | 32-bit |
| 最大时钟频率 | 120 MHz |
| Program Memory (Flash) | 1 MB (1M x 8) |
| RAM Size | 128 KB |
| 封装 | 144-LQFP (20x20 mm) |
| 电源电压 | 1.71 V to 3.6 V |
| USB Interface | USB 2.0 Full-Speed device/host/OTG with on-chip PHY |
| Hardware Encryption | AES-128 |
| Anti-Tamper Pins | Yes (secure tamper detection) |
| ADC | 16-bit SAR, multi-channel |
| DAC | 12-bit |
| 工作温度 | -40 C to +105 C (V) |
| 安装类型 | Surface Mount (LQFP) |
| RoHS 状态 | Compliant |
| Lead Free | Yes |
| Lifecycle | NRND (Not Recommended for New Designs) |
MK21FN1M0VLQ12 引脚配置
| 引脚 1 | PTB0 — GPIO / ADC0_SE0 / FTM0_CH0 |
| 引脚 2 | PTB1 — GPIO / ADC0_SE1 / FTM0_CH1 |
| 引脚 3 | PTB2 — GPIO / ADC0_SE2 / FTM0_CH2 |
| 引脚 4 | PTB3 — GPIO / ADC0_SE3 / FTM0_CH3 |
| 引脚 5 | VDD — Digital supply voltage |
| 引脚 6 | VSS — Digital ground |
| 引脚 7 | PTA0 — JTAG_TCLK / SWD_CLK |
| 引脚 8 | PTA1 — JTAG_TDI / SWD_DIO |
| 引脚 9 | PTA2 — JTAG_TDO / SWO |
| 引脚 10 | PTA3 — JTAG_TMS / SWD_DIO |
| 引脚 11 | PTA4 — JTAG_TRSTb |
| 引脚 12 | PTA5 — RESET_b |
| 引脚 13 | PTA6 — GPIO / FTM0_CH3 / I2S_RX_BCLK |
| 引脚 14 | PTA7 — GPIO / FTM0_CH4 / I2S_RX_FS |
| 引脚 15 | PTA8 — GPIO / FTM0_CH5 / I2S_RX_MCLK |
| 引脚 16 | PTA9 — GPIO / FTM0_CH6 / I2S_RX_D |
| 引脚 17 | PTA10 — GPIO / FTM2_CH0 / I2S_TX_BCLK |
| 引脚 18 | PTA11 — GPIO / FTM2_CH1 / I2S_TX_D |
| 引脚 19 | PTA12 — GPIO / FTM2_CH2 / I2S_TX_FS |
| 引脚 20 | PTA13 — GPIO / FTM2_CH3 / I2S_TX_MCLK |
| 引脚 21 | PTA14 — GPIO / FTM1_CH0 / I2S_CLKIN |
| 引脚 22 | PTA15 — GPIO / FTM1_CH1 / I2S_CLKIN |
| 引脚 23 | PTA16 — GPIO / SPI0_SIN / FTM0_CH5 |
| 引脚 24 | PTA17 — GPIO / SPI0_SOUT / FTM0_CH6 |
| 引脚 25 | PTA18 — GPIO / SPI0_SCK / FTM0_CH7 |
| 引脚 26 | PTA19 — GPIO / SPI0_PCS0 / FTM2_FLT3 |
| 引脚 27 | VDD — Digital supply voltage |
| 引脚 28 | VSS — Digital ground |
| 引脚 29 | PTC0 — GPIO / FTM0_CH0 / EXTRG_IN |
| 引脚 30 | PTC1 — GPIO / FTM0_CH1 / EXTRG_IN |
| 引脚 31 | PTC2 — GPIO / FTM0_CH2 / CMP1_OUT |
| 引脚 32 | PTC3 — GPIO / FTM0_CH3 / CMP2_OUT |
| 引脚 33 | PTC4 — GPIO / FTM0_CH4 / USB_SOF_OUT |
| 引脚 34 | PTC5 — GPIO / FTM0_CH5 / CMP1_OUT |
| 引脚 35 | PTC6 — GPIO / FTM0_CH6 / CMP2_OUT |
| 引脚 36 | PTC7 — GPIO / FTM0_CH7 / CMP3_OUT |
| 引脚 37 | PTC8 — GPIO / FTM3_CH4 / ADC1_SE8 |
| 引脚 38 | PTC9 — GPIO / FTM3_CH5 / ADC1_SE9 |
| 引脚 39 | PTC10 — GPIO / FTM3_CH6 / ADC1_SE10 |
| 引脚 40 | PTC11 — GPIO / FTM3_CH7 / ADC1_SE11 |
| 引脚 41 | PTC12 — GPIO / FTM3_CH0 / ADC1_SE12 |
| 引脚 42 | PTC13 — GPIO / FTM3_CH1 / ADC1_SE13 |
| 引脚 43 | PTC14 — GPIO / FTM3_CH2 / ADC1_SE14 |
| 引脚 44 | PTC15 — GPIO / FTM3_CH3 / ADC1_SE15 |
| 引脚 45 | PTC16 — GPIO / FTM3_CH4 / ADC1_SE16 |
| 引脚 46 | PTC17 — GPIO / FTM3_CH5 / ADC1_SE17 |
| 引脚 47 | PTC18 — GPIO / FTM3_CH6 / ADC1_SE18 |
| 引脚 48 | PTC19 — GPIO / FTM3_CH7 / ADC1_SE19 |
| 引脚 49 | VDD — Digital supply voltage |
| 引脚 50 | VSS — Digital ground |
| 引脚 51 | PTD0 — GPIO / FTM0_CH0 / SPI1_PCS0 |
| 引脚 52 | PTD1 — GPIO / FTM0_CH1 / SPI1_SCK |
| 引脚 53 | PTD2 — GPIO / FTM0_CH2 / SPI1_SOUT |
| 引脚 54 | PTD3 — GPIO / FTM0_CH3 / SPI1_SIN |
| 引脚 55 | PTD4 — GPIO / FTM0_CH4 / SPI1_PCS1 |
| 引脚 56 | PTD5 — GPIO / FTM0_CH5 / SPI1_PCS2 |
| 引脚 57 | PTD6 — GPIO / FTM0_CH6 / SPI1_PCS3 |
| 引脚 58 | PTD7 — GPIO / FTM0_CH7 / CMP1_OUT |
| 引脚 59 | PTD8 — GPIO / FTM1_CH0 / I2C0_SCL |
| 引脚 60 | PTD9 — GPIO / FTM1_CH1 / I2C0_SDA |
| 引脚 61 | PTD10 — GPIO / FTM1_CH2 / I2C1_SCL |
| 引脚 62 | PTD11 — GPIO / FTM1_CH3 / I2C1_SDA |
| 引脚 63 | PTD12 — GPIO / FTM1_CH4 / FTM3_FLT1 |
| 引脚 64 | PTD13 — GPIO / FTM1_CH5 / FTM3_FLT2 |
| 引脚 65 | PTD14 — GPIO / FTM1_CH6 / FTM3_FLT3 |
| 引脚 66 | PTD15 — GPIO / FTM1_CH7 / FTM0_FLT3 |
| 引脚 67 | PTD16 — GPIO / FTM0_CH0 / UART2_TX |
| 引脚 68 | PTD17 — GPIO / FTM0_CH1 / UART2_RX |
| 引脚 69 | PTD18 — GPIO / FTM0_CH2 / UART2_RTS_b |
| 引脚 70 | PTD19 — GPIO / FTM0_CH3 / UART2_CTS_b |
| 引脚 71 | VDD — Digital supply voltage |
| 引脚 72 | VSS — Digital ground |
| 引脚 73 | PTE0 — GPIO / FTM1_CH0 / I2S_CLKIN |
| 引脚 74 | PTE1 — GPIO / FTM1_CH1 / I2S_RXD0 |
| 引脚 75 | PTE2 — GPIO / FTM1_CH2 / I2S_RX_FS |
| 引脚 76 | PTE3 — GPIO / FTM1_CH3 / I2S_RX_BCLK |
| 引脚 77 | PTE4 — GPIO / FTM2_CH0 / SPI2_PCS0 |
| 引脚 78 | PTE5 — GPIO / FTM2_CH1 / SPI2_SCK |
| 引脚 79 | PTE6 — GPIO / FTM2_CH2 / SPI2_SOUT |
| 引脚 80 | PTE7 — GPIO / FTM2_CH3 / SPI2_SIN |
| 引脚 81 | PTE8 — GPIO / FTM2_CH4 / UART5_TX |
| 引脚 82 | PTE9 — GPIO / FTM2_CH5 / UART5_RX |
| 引脚 83 | PTE10 — GPIO / FTM2_CH6 / I2C2_SCL |
| 引脚 84 | PTE11 — GPIO / FTM2_CH7 / I2C2_SDA |
| 引脚 85 | PTE12 — GPIO / FTM3_CH0 / SPI2_PCS1 |
| 引脚 86 | PTE13 — GPIO / FTM3_CH1 / SPI2_PCS2 |
| 引脚 87 | PTE14 — GPIO / FTM3_CH2 / SPI2_PCS3 |
| 引脚 88 | PTE15 — GPIO / FTM3_CH3 / I2S_TXD0 |
| 引脚 89 | PTE16 — GPIO / UART4_TX / CMP3_OUT |
| 引脚 90 | PTE17 — GPIO / UART4_RX / CMP2_OUT |
| 引脚 91 | PTE18 — GPIO / UART4_RTS_b / CMP1_OUT |
| 引脚 92 | PTE19 — GPIO / UART4_CTS_b / CMP0_OUT |
| 引脚 93 | VDD — Digital supply voltage |
| 引脚 94 | VSS — Digital ground |
| 引脚 95 | USB0_DP — USB D+ (Full-Speed with on-chip PHY) |
| 引脚 96 | USB0_DM — USB D- (Full-Speed with on-chip PHY) |
| 引脚 97 | VOUT33 — USB 3.3 V regulator output (bypass required) |
| 引脚 98 | VREGIN — USB regulator input |
| 引脚 99 | USB0_VBUS — USB VBUS detect |
| 引脚 100 | USB0_ID — USB OTG ID (host vs device detect) |
| 引脚 101 | RTC_XTAL32 — 32 kHz RTC crystal input |
| 引脚 102 | RTC_XTAL32B — 32 kHz RTC crystal output |
| 引脚 103 | VDD — Digital supply voltage |
| 引脚 104 | VSS — Digital ground |
| 引脚 105 | TAMPER0 — Tamper detect pin 0 |
| 引脚 106 | TAMPER1 — Tamper detect pin 1 |
| 引脚 107 | TAMPER2 — Tamper detect pin 2 |
| 引脚 108 | TAMPER3 — Tamper detect pin 3 |
| 引脚 109 | TAMPER4 — Tamper detect pin 4 |
| 引脚 110 | TAMPER5 — Tamper detect pin 5 |
| 引脚 111 | TAMPER6 — Tamper detect pin 6 |
| 引脚 112 | TAMPER7 — Tamper detect pin 7 |
| 引脚 113 | ADC0_DP0 — ADC0 differential pair 0 input (P-side) |
| 引脚 114 | ADC0_DM0 — ADC0 differential pair 0 input (N-side) |
| 引脚 115 | ADC0_DP1 — ADC0 differential pair 1 input (P-side) |
| 引脚 116 | ADC0_DM1 — ADC0 differential pair 1 input (N-side) |
| 引脚 117 | ADC1_DP0 — ADC1 differential pair 0 input (P-side) |
| 引脚 118 | ADC1_DM0 — ADC1 differential pair 0 input (N-side) |
| 引脚 119 | VDD — Digital supply voltage |
| 引脚 120 | VSS — Digital ground |
| 引脚 121 | DAC0_OUT — 12-bit DAC0 output |
| 引脚 122 | DAC1_OUT — 12-bit DAC1 output |
| 引脚 123 | VREFH — ADC high reference voltage input |
| 引脚 124 | VREFL — ADC low reference voltage input |
| 引脚 125 | VDDA — Analog supply voltage |
| 引脚 126 | VSSA — Analog ground |
| 引脚 127 | OSC0_XTAL — Main crystal oscillator input |
| 引脚 128 | OSC0_EXTAL — Main crystal oscillator output |
| 引脚 129 | RTC_WAKEUP_B — RTC wakeup output / tamper pin (alt) |
| 引脚 130 | PTF0 — GPIO / FTM3_CH0 / I2S_TXD0 |
| 引脚 131 | PTF1 — GPIO / FTM3_CH1 / I2S_TXD1 |
| 引脚 132 | PTF2 — GPIO / FTM3_CH2 / I2S_RXD0 |
| 引脚 133 | PTF3 — GPIO / FTM3_CH3 / I2S_RXD1 |
| 引脚 134 | PTF4 — GPIO / FTM3_CH4 / I2S_RX_FS |
| 引脚 135 | PTF5 — GPIO / FTM3_CH5 / I2S_RX_BCLK |
| 引脚 136 | PTF6 — GPIO / FTM3_CH6 / I2S_TX_BCLK |
| 引脚 137 | PTF7 — GPIO / FTM3_CH7 / I2S_TX_FS |
| 引脚 138 | PTG0 — GPIO / FTM0_CH0 / I2S_TXD0 |
| 引脚 139 | PTG1 — GPIO / FTM0_CH1 / I2S_TXD1 |
| 引脚 140 | PTG2 — GPIO / FTM0_CH2 / I2S_RXD0 |
| 引脚 141 | PTG3 — GPIO / FTM0_CH3 / I2S_RXD1 |
| 引脚 142 | PTG4 — GPIO / FTM0_CH4 / I2S_RX_FS |
| 引脚 143 | PTG5 — GPIO / FTM0_CH5 / I2S_RX_BCLK |
| 引脚 144 | PTG6 — GPIO / FTM0_CH6 / I2S_TX_BCLK |
典型应用
MK21FN1M0VLQ12 适用于 6 应用s: USB-Connected Secure Industrial Sensors, Point-of-Sale Terminals with Hardware Crypto, Smart Electricity Meters with Tamper Detection, Secure Building Automation Gateways, Wearable Health Monitors (Non-FDA Class), Low-Power Segment-LCD HMI Controllers.
USB-Connected Secure Industrial Sensors
Why MK21FN1M0VLQ12 fits: The 120 MHz Cortex-M4 with FPU runs USB 2.0 Full-Speed stacks with on-chip PHY, while hardware AES-128 and tamper pins protect telemetry against software and physical attacks. 1 MB Flash accommodates USB + TLS stacks; 128 KB SRAM buffers continuous measurement streams. Usage and performance: Place the MCU between a 24 V-to-3.3 V industrial rail and the USB D+/D- lines; ensure 90 ohm differential routing, a common-mode choke, and ESD protection. The MK21FN1M0VLQ12 trades Ethernet for lower USB power draw, ideal for low-volume secure sensor nodes, while the MK24FN1M0 variant is a marginal upgrade if HS USB is later required.
推荐
Point-of-Sale Terminals with Hardware Crypto
Why MK21FN1M0VLQ12 fits: Hardware AES-128 accelerators and tamper-detection pins enable PCI-PTS-style secure key storage on the same silicon; 1 MB Flash stores PIN handling, contactless, and crypto firmware. 120 MHz Cortex-M4 with FPU runs DES, AES, RSA helpers fast enough for EMV contactless transactions. Usage and performance: Use Secure JTAG disabled pin to keep debug port locked in production, route tamper pins to enclosure intrusion mesh, and run BIST at boot. The MK24FN1M0 variant is the right swap only if a future migration to HS USB peripherals is planned.
推荐
Smart Electricity Meters with Tamper Detection
Why MK21FN1M0VLQ12 fits: The K21F adds dedicated tamper pins for magnetic and physical intrusion alarms, plus a 16-bit SAR ADC with adequate channels for voltage, current, and temperature sensors. 128 KB SRAM holds metering accumulators with headroom for DLMS/COSEM stacks, and 1 MB Flash stores firmware and calibration tables. Usage and performance: The MCU fits the 1.71-3.6 V supply range typical of battery-buffered meters and offers low-power Stop mode for black-out conditions. Pick MK22FN1M0VLQ12 if a segment-LCD display replaces the LED matrix without changing the surrounding footprint.
推荐
Secure Building Automation Gateways
Why MK21FN1M0VLQ12 fits: USB OTG with on-chip PHY lets the gateway expose a USB mass-storage slot for firmware updates or a USB cellular dongle for backup connectivity. Hardware AES-128 secures local BACnet/Modbus communications; tamper pins detect panel opening. 1 MB Flash holds multi-protocol stacks including BACnet, KNX, and TLS. Usage and performance: Power the MCU from 24 V building bus via an LDO and route USB to Type-A or micro-B depending on housing. The MK21FN1M0VLQ12 keeps current draw modest, but when adding HS peripherals, switch to MK24FN1M0VLQ12 with hardware-compatible footprint.
推荐
Wearable Health Monitors (Non-FDA Class)
Why MK21FN1M0VLQ12 fits: 120 MHz Cortex-M4 with DSP extensions runs HRV and step-count DSP filters; 128 KB SRAM keeps time-series windows; full-speed USB eases tethered charging and data offload. Hardware crypto and tamper pins protect biometric data at rest. Usage and performance: Place the MCU on a 1.8 V rail to take advantage of low-voltage Stop mode below 200 uA; this trims wearable battery budget. For lighter applications where LCD driving is the priority, MK22FN1M0VLQ12 may be selected without sacrificing the same 144-LQFP PCB layout.
推荐
Low-Power Segment-LCD HMI Controllers
Why MK21FN1M0VLQ12 fits: Although the LCD controller is more pronounced on the K22 family, K21F still supports segment LCD driving for simple dash displays and panel meters. 1 MB Flash stores complex graph state-machines; 120 MHz handles USB-to-LCD bridging. Usage and performance: Choose this application as a fall-back only when K22 LCD is over-spec, otherwise prefer MK22FN1M0VLQ12 for the same 144-LQFP PCB. Trade-off: K22 routes fewer pins to GPIO but adds segmented display bias generation; the K21 family keeps the GPIO-heavy secure-application footprint.
推荐
推荐产品汇总
工程参考数据： MK21FN1M0VLQ12 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MK21FN1M0VLQ12R | MK22FN1M0AVLQ12 | MK24FN1M0VLQ12 | MK22FN1M0VLQ12 | MK24FN1M0VLQ12R |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 144-LQFP (20x20) | 144-LQFP (20x20) | 144-LQFP (20x20) | 144-LQFP (20x20) | 144-LQFP (20x20) | 144-LQFP (20x20) |
| Core | Cortex-M4 with FPU | Cortex-M4 with FPU | Cortex-M4 with FPU | Cortex-M4 with FPU | Cortex-M4 with FPU | Cortex-M4 with FPU |
| Max Clock | 120 MHz | 120 MHz | 120 MHz | 120 MHz | 120 MHz | 120 MHz |
| Flash | 1 MB | 1 MB | 1 MB | 1 MB | 1 MB | 1 MB |
| SRAM | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
关键差异点
- Hardware AES-128 and tamper pins on-chip （对比 MK22FN1M0AVLQ12)
- Pin-compatible upgrade path to High-Speed USB （对比 MK24FN1M0VLQ12)
- On-chip full-speed USB PHY (no external ULPI chip) （对比 MK60 series (NRND/legacy))
设计说明
Estimated: For a 144-pin 0.5 mm pitch LQFP, the standard NXP K-series decouple recipe is one 100 nF X7R per VDD/VSS pair plus 4.7 uF X5R bulk within ~10 mm. With about 8 VDD pins on this package the cap count is roughly 9. Without this, MCORE ripple can corrupt ADC readings and corrupt USB 2.0 eye tests.
USB 2.0 Full-Speed D+/D- must be 90 ohm differential over a continuous ground plane with no stubs; include a common-mode choke and a transient suppressor. Without these, full-speed eye diagrams fail compliance and full-speed enumeration may fail at the host. NXP provides a dedicated Application Note for K2x USB layout that should be followed exactly.
The MK21FN1M0VLQ12 is NRND, so production orders must be confirmed against the latest NXP PCN stream before lock-in. Failing to do this may trap a design into a 1-year Last-Time-Buy if demand suddenly contracts; pair the part with MK24FN1M0 as a footprint-compatible second-source and keep firmware portable between the two.
Estimated: at maximum 120 MHz, the K21F typically draws about 30 mA with peripherals active, so dissipation stays under 0.1 W at 3.3 V. Theta_JA on 144-LQFP is around 50-55 C/W on a 4-layer JEDEC test board with adequate vias - well within safety - but a small copper pour on VDD/VSS pairs is recommended for cold-swap transients.
合规信息
MK21FN1M0VLQ12 ships in a lead-free 144-LQFP that is RoHS-compliant; reach, halogen-free, and conflict-minerals declarations are not present in the verified web data and should be requested from NXP product compliance if required.
