PIC24FJ128GB606-I/MR - 16-bit 32MHz 128KB Flash USB MCU | Microchip
料号： PIC24FJ128GB606-I/MR ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $5.65 | $5.65 |
| 10 | $5.08 | $50.80 |
| 100 | $4.52 | $452.00 |
| 500 | $4.05 | $2,025.00 |
| 1,000 | $3.62 | $3,620.00 |
PIC24FJ128GB606-I/MR 概述
A microcontroller (MCU) is an integrated circuit that combines a CPU core, program memory (Flash), working memory (RAM), and a configurable set of peripherals such as timers, ADC, communication controllers, and I/O pins, all on a single die. Within the broader semiconductor taxonomy, a PIC24F MCU belongs to the family of 16-bit microcontrollers, which sit above 8-bit MCUs in compute and memory capability but below 32-bit Cortex-M and high-end application processors. PIC24F parts in particular target low-power, USB- or graphics-friendly embedded designs, balancing deterministic 16-MIPS throughput with eXtreme Low Power (XLP) sleep modes.
Key differentiating features of the PIC24FJ128GB606 include dual-bank Flash with Live Update (enabling firmware swap without device reset), 128 KB program Flash (43K x 24 words), 32 KB RAM, full-speed USB 2.0 OTG with on-chip transceiver, 53 general-purpose I/O, peripheral-pinning remapping, multiple serial interfaces (UART, SPI, I2C), a real-time clock calendar (RTCC) with on-chip 32 kHz oscillator, and XLP technology for sub-uA sleep current.
Architecturally, the PIC24FJ128GB606 uses Microchip's 16-bit modified-Harvard core with a 24-bit instruction word, delivering up to 16 MIPS at 32 MHz while operating from a single 2.0 V to 3.6 V supply. The dual-panel Flash memory plus a small boot Flash row supports field firmware updates via Live Update: code can be written to the inactive panel while the active panel continues to run, then a controlled swap is performed - useful for industrial and IoT devices that cannot tolerate shutdown during firmware upgrades. On-chip peripherals are mapped through Peripheral Pin Select (PPS), giving the designer flexibility to assign digital peripherals to a wide range of I/O pins without hardware rework.
Typical applications include USB peripherals (HID, CDC, mass storage, audio class), industrial sensor hubs, portable data loggers, USB-connected human-interface devices, and low-power wireless sensor nodes bridging to external radios. The integrated CTMU makes the device a strong fit for capacitive-touch keypads, time-of-flight measurements, and precision analog front ends using the on-chip 10/12-bit ADC. The 53-I/O count also suits mixed-signal control boards that previously required a 64/80/100-pin PIC24, enabling footprint reduction when migrating a panel to a smaller 64-pin QFN.
Designers should note that the MR suffix indicates a QFN-64 (9x9 mm) package with an exposed thermal pad (EP); the exposed pad must be soldered to a properly sized copper island on the PCB for thermal relief and electrical ground. Power decoupling should follow Microchip's typical-application guidance: 0.1 uF and 1 uF ceramic caps placed within 5 mm of the VDD/VSS pairs, plus a 4.7 uF bulk cap on the main rail. For USB OTG operation, the internal 3.3 V regulator must be enabled and a 1 uF cap placed on the VUSB3V pin per the manufacturer datasheet.
This page synthesizes distributor pricing, drop-in alternatives from Microchip's own 24FJ product family and cross-brand references, and practical design notes not found in the bare datasheet, giving procurement and firmware teams a one-stop reference for the PIC24FJ128GB606-I/MR.
直接替换替代料： PIC24FJ128GB606-I/MR ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： PIC24FJ128GB606-I/MR （相同外形与封装尺寸） ——差异在于 Package, ADC, Core Architecture, Program Memory (Flash), Operating Temperature.
快速对比工具——选择替代料号进行并排对比：
PIC24FJ128GB606-E/MR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$3.78 / 个
查看数据手册 →PIC24FJ128GA606-I/MR
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
PIC24FJ1024GB606T-I/MR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$3.72 / 个
查看数据手册 →PIC24FJ1024GA606-I/MR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$4.85 / 个
查看数据手册 →PIC24FJ128DA106-I/MR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$2.4 / 个
查看数据手册 →PIC24FJ128GA106-I/MR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$4.15 / 个
查看数据手册 →PIC24FJ128GB606-I/MR 最大额定值与电气特性
| Core | PIC24F 16-bit |
| Instruction Set | 16-bit modified-Harvard, 24-bit instruction word |
| Maximum CPU Speed | 32 MHz (16 MIPS) |
| Program Flash | 128 KB (43K x 24 words), dual-bank with Live Update |
| Data RAM | 32 KB |
| Operating Voltage (VDD) | 2.0 V to 3.6 V |
| I/O Pins | 53 |
| USB Interface | USB 2.0 Full-Speed On-The-Go (OTG) with on-chip transceiver |
| ADC | 10-bit and 12-bit options |
| CTMU | Charge-Time Measurement Unit (touch, time-of-flight) |
| Configurable Logic Cells (CLC) | Yes |
| Peripheral Pin Select (PPS) | Yes |
| 工作温度范围 | -40C to +85C (Industrial) |
| 封装 | 64-pin QFN (9x9 mm) with exposed pad (MR) |
| 安装类型 | Surface Mount |
| MSL 等级 | 3 (per JEDEC J-STD-020) |
| RoHS 状态 | Compliant |
PIC24FJ128GB606-I/MR 引脚配置
| 引脚 1 | RA0 — Port A bit 0 / analog input |
| 引脚 2 | RA1 — Port A bit 1 / analog input |
| 引脚 3 | RA2 — Port A bit 2 / analog input |
| 引脚 4 | RA3 — Port A bit 3 / analog input |
| 引脚 5 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 6 | VSS — Ground reference |
| 引脚 7 | OSC1 — Crystal oscillator input |
| 引脚 8 | OSC2 — Crystal oscillator output |
| 引脚 9 | RA4 — Port A bit 4 / SOSCO |
| 引脚 10 | RA5 — Port A bit 5 / SOSCI |
| 引脚 11 | RB0 — Port B bit 0 / programming clock (PGECx) |
| 引脚 12 | RB1 — Port B bit 1 / programming data (PGEDx) |
| 引脚 13 | RB2 — Port B bit 2 |
| 引脚 14 | RB3 — Port B bit 3 |
| 引脚 15 | RB4 — Port B bit 4 |
| 引脚 16 | RB5 — Port B bit 5 |
| 引脚 17 | RB6 — Port B bit 6 |
| 引脚 18 | RB7 — Port B bit 7 |
| 引脚 19 | RB8 — Port B bit 8 |
| 引脚 20 | RB9 — Port B bit 9 |
| 引脚 21 | RB10 — Port B bit 10 |
| 引脚 22 | RB11 — Port B bit 11 |
| 引脚 23 | VSS — Ground reference |
| 引脚 24 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 25 | RC0 — Port C bit 0 |
| 引脚 26 | RC1 — Port C bit 1 |
| 引脚 27 | RC2 — Port C bit 2 |
| 引脚 28 | RC3 — Port C bit 3 |
| 引脚 29 | RC4 — Port C bit 4 |
| 引脚 30 | RC5 — Port C bit 5 |
| 引脚 31 | RC6 — Port C bit 6 |
| 引脚 32 | RC7 — Port C bit 7 |
| 引脚 33 | RC8 — Port C bit 8 |
| 引脚 34 | RC9 — Port C bit 9 |
| 引脚 35 | RD0 — Port D bit 0 |
| 引脚 36 | RD1 — Port D bit 1 |
| 引脚 37 | RD2 — Port D bit 2 |
| 引脚 38 | RD3 — Port D bit 3 |
| 引脚 39 | RD4 — Port D bit 4 |
| 引脚 40 | RD5 — Port D bit 5 |
| 引脚 41 | RD6 — Port D bit 6 |
| 引脚 42 | RD7 — Port D bit 7 |
| 引脚 43 | RD8 — Port D bit 8 |
| 引脚 44 | RD9 — Port D bit 9 |
| 引脚 45 | RD10 — Port D bit 10 |
| 引脚 46 | RD11 — Port D bit 11 |
| 引脚 47 | RE0 — Port E bit 0 |
| 引脚 48 | RE1 — Port E bit 1 |
| 引脚 49 | RE2 — Port E bit 2 |
| 引脚 50 | RE3 — Port E bit 3 |
| 引脚 51 | RE4 — Port E bit 4 |
| 引脚 52 | RE5 — Port E bit 5 |
| 引脚 53 | RE6 — Port E bit 6 |
| 引脚 54 | RE7 — Port E bit 7 |
| 引脚 55 | RF0 — Port F bit 0 |
| 引脚 56 | RF1 — Port F bit 1 |
| 引脚 57 | RF2 — Port F bit 2 |
| 引脚 58 | RF3 — Port F bit 3 |
| 引脚 59 | RF4 — Port F bit 4 |
| 引脚 60 | RF5 — Port F bit 5 |
| 引脚 61 | RG0 — Port G bit 0 |
| 引脚 62 | RG1 — Port G bit 1 |
| 引脚 63 | RG2 — Port G bit 2 / D+ USB |
| 引脚 64 | RG3 — Port G bit 3 / D- USB |
典型应用
PIC24FJ128GB606-I/MR 适用于 7 应用s: USB HID / CDC Peripherals, Capacitive Touch Keypads, Industrial Sensor Hubs with USB Diagnostics, USB Mass Storage and Audio Class Devices, Portable Data Loggers, USB-Connected Wearable Devices, Field-Upgradable IoT Edge Nodes.
USB HID / CDC Peripherals
The PIC24FJ128GB606-I/MR fits USB HID and CDC peripherals because its on-chip Full-Speed USB 2.0 OTG transceiver eliminates the external PHY, reducing BOM cost and PCB area in keyboards, mice, custom HID devices, and USB-to-UART bridges. The 32 MHz (16 MIPS) core delivers deterministic throughput for HID report generation at the standard 1 ms USB Full-Speed polling interval, while 128 KB Flash and 32 KB RAM easily hold USB stacks such as Microchip's MPLAB Harmony USB framework plus application firmware. Place the part in a QFN-64 footprint with a 0.1 uF + 1 uF VDD decoupling network within 5 mm of the pins; the internal 3.3 V regulator and VUSB3V 1 uF cap complete the USB bus supply per the manufacturer datasheet.
推荐
Capacitive Touch Keypads
The PIC24FJ128GB606-I/MR is well suited to capacitive touch keypads because its on-chip Charge-Time Measurement Unit (CTMU) measures sub-ns current with high linearity, enabling up to 53 touch channels via the 53 I/O pins. Combined with the 10/12-bit ADC for guard-channel diagnostics and the Configurable Logic Cells (CLC) for hardware debounce, a single MCU can replace a dedicated touch controller plus external logic. Live Update dual-bank Flash lets firmware in the field be upgraded to support new keypad layouts without bricking the device - critical for appliances and industrial panels installed in the field for years.
推荐
Industrial Sensor Hubs with USB Diagnostics
The PIC24FJ128GB606-I/MR is a strong fit for industrial sensor hubs because its 12-bit ADC (10-bit option for higher speed), CTMU, RTCC, and USB OTG combination lets one chip digitize sensors, timestamp events, and expose configuration/diagnostics over USB. The 128 KB dual-bank Flash with Live Update is especially valuable for industrial deployments where firmware patches must be applied without a maintenance window, and the -40C to +85C industrial temperature range covers most factory-floor environments. Pair with external op-amps for signal conditioning and an RS-485 transceiver for legacy fieldbus; the 53 I/O leave headroom for both legacy and USB paths.
推荐
USB Mass Storage and Audio Class Devices
The PIC24FJ128GB606-I/MR targets USB mass storage (MSD) and audio class devices because its Full-Speed USB OTG controller supports mass-storage class drivers and isochronous audio endpoints directly, while 128 KB Flash and 32 KB RAM hold MSD stacks and FAT file system plus a small audio playback engine. The on-chip 3.3 V regulator and integrated transceiver shrink the USB portion of the BOM, letting the design focus on storage media (SD card via SPI) or audio DAC interfacing. The Live Update feature lets firmware be upgraded over USB itself, avoiding physical access to the device for service.
推荐
Portable Data Loggers
The PIC24FJ128GB606-I/MR fits portable battery-powered data loggers because its eXtreme Low Power (XLP) technology and configurable sleep modes drop quiescent current into the sub-uA range between ADC samples, while 32 KB RAM buffers logging bursts and 128 KB Flash stores configuration profiles. The on-chip RTCC with selectable 32 kHz crystal source timestamps events without waking the core, and the 12-bit ADC captures battery voltage plus sensor data with auto-scan sequencing. USB OTG lets the recorded data be offloaded via USB without an external bridge chip.
推荐
USB-Connected Wearable Devices
The PIC24FJ128GB606-I/MR suits wearable and fitness devices because its 9x9 mm QFN-64 footprint plus integrated USB OTG enables charging cradles and data sync docks without external components, while XLP sleep modes and the 32 KB RAM let motion-processing firmware stay resident. CTMU enables capacitive touch buttons for UI, and the dual-bank Flash with Live Update is critical for firmware updates over years of deployed life. Pair with a low-power 3-axis accelerometer or 6-axis IMU over I2C/SPI; the 53 I/O leave headroom for haptic drivers and LED indicators.
推荐
Field-Upgradable IoT Edge Nodes
The PIC24FJ128GB606-I/MR is ideal for IoT edge nodes requiring field firmware upgrades because its dual-bank Flash with Live Update lets a new image be written to the inactive panel, verified, then swapped atomically - eliminating the bricking risk of single-bank designs. The integrated USB OTG gives a convenient provisioning path for technicians in the field via any USB host, removing the need for dedicated programmers. The 16 MIPS core, RTCC, CTMU, and 53 I/O support rich sensor and actuator integration without an external companion MCU, and the industrial -40C to +85C temperature range handles outdoor enclosures.
推荐
推荐产品汇总
工程参考数据： PIC24FJ128GB606-I/MR ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | PIC24FJ128GB606-E/MR | PIC24FJ128GA606-I/MR | PIC24FJ1024GB606T-I/MR | PIC24FJ1024GA606-I/MR | PIC24FJ128DA106-I/MR | PIC24FJ128GA106-I/MR |
|---|---|---|---|---|---|---|---|
| Package | QFN-64 (MR) 9x9 mm | QFN-64 (MR) 9x9 mm | QFN-64 (MR) 9x9 mm | QFN-64 (MR) 9x9 mm | QFN-64 (MR) 9x9 mm | QFN-64 (MR) 9x9 mm | QFN-64 (MR) 9x9 mm |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Program Flash | 128 KB | 128 KB | 128 KB | 1024 KB | 1024 KB | 128 KB | 128 KB |
| Data RAM | 32 KB | 32 KB | 32 KB | 32 KB | 32 KB | 32 KB | 32 KB |
| USB OTG | USB 2.0 FS OTG | USB 2.0 FS OTG | No (segment LCD) | USB 2.0 FS OTG | No (segment LCD) | No (segment LCD + crypto) | No (segment LCD) |
| Temperature Grade | -40C to +85C (Industrial) | -40C to +125C (Extended) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Core / Speed | PIC24F 16-bit / 32 MHz (16 MIPS) | PIC24F 16-bit / 32 MHz | PIC24F 16-bit / 32 MHz | PIC24F 16-bit / 32 MHz | PIC24F 16-bit / 32 MHz | PIC24F 16-bit / 32 MHz | PIC24F 16-bit / 32 MHz |
| I/O Pins | 53 | 53 | 53 | 53 | 53 | 53 | 53 |
关键差异点
- Integrated USB 2.0 Full-Speed OTG transceiver on-chip （对比 PIC24FJ128GA606-I/MR)
- Dual-bank Flash with Live Update firmware swapping （对比 PIC24FJ128GB606-E/MR (same family, extended temp))
- 53 I/O pins in a compact 9x9 mm QFN-64 footprint （对比 PIC24FJ128GB410-I/PT (TQFP-100))
设计说明
Place 0.1 uF and 1 uF ceramic decoupling capacitors within 5 mm of each VDD/VSS pair on the PIC24FJ128GB606-I/MR. Add a 4.7 uF bulk capacitor on the main 3.3 V rail. When USB OTG is used, enable the internal 3.3 V regulator and place a 1 uF capacitor on the VUSB3V pin to satisfy USB bus-suspend current requirements per the manufacturer datasheet. Operating range is 2.0 V to 3.6 V - dropping below 2.0 V may cause Flash programming to fail.
The QFN-64 (MR) package exposes a thermal pad on the bottom that MUST be soldered to a PCB copper island (recommended at least 100 mm^2 of 1 oz copper) to provide both the thermal path and the ground reference. Failure to solder the exposed pad results in elevated junction temperature and possible long-term reliability degradation, especially in industrial temperature applications. The thermal pad should have multiple thermal vias to the inner ground plane to spread heat.
Route the USB D+ and D- traces from pins 63/64 as a 90 ohm differential pair, keeping them short and isolated from switching signals. Place the USB ESD protection array (e.g., USBLC6-2SC6) close to the USB connector, with the protection ground connected directly to the chassis ground. Maintain a continuous ground plane under the USB traces; avoid splitting the ground plane beneath the differential pair, which can introduce common-mode noise.
Use Peripheral Pin Select (PPS) to remap digital peripherals to any available I/O pin, but document the mapping carefully in firmware - PPS registers must be unlocked and configured before use. Place CTMOS-driven capacitive touch traces with appropriate guarding to minimize parasitic capacitance to ground and adjacent traces, and avoid running them near switching power or USB lines to prevent touch false-triggers. Programming pins (PGECx/PGEDx) on RB0/RB1 must be accessible for ICSP during board bring-up.
When migrating to the Live Update dual-bank Flash mode, ensure the boot configuration row points to a valid panel and that the swap sequence is protected against power loss mid-update. Do not exceed 32 MHz on the system clock without verifying PLL lock; the PIC24FJ128GB606 datasheet warns of unstable operation below 2.0 V at higher clock rates. For USB suspend current compliance, disable all unused peripherals and configure unused I/O as outputs driven low to minimize leakage.
合规信息
RoHS and lead-free compliant per Microchip product page. Not AEC-Q100 qualified - choose AEC-Q100 qualified parts from the PIC24F automotive family for automotive applications. PIC24FJ128GB606 marked NRND (Not Recommended for new designs) on Microchip product page; verify PCN status before starting new designs.
