PIC32MZ2064DAL176T-V/2J - 200MHz 32-bit MCU, 2MB Flash, 176-LQFP
料号： PIC32MZ2064DAL176T-V/2J ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $16.74 | $16.74 |
| 10 | $15.06 | $150.60 |
| 100 | $13.39 | $1,339.00 |
| 500 | $11.72 | $5,860.00 |
| 1,000 | $10.05 | $10,050.00 |
PIC32MZ2064DAL176T-V/2J 概述
What is a PIC32MZ DAL microcontroller? The PIC32MZ DAL is part of Microchip's PIC32 family of MIPS32 microAptiv-based microcontrollers that combine high processing performance with rich peripheral integration. In the broader taxonomy, it sits at: PIC32MZ DAL -> 32-bit MCU -> microcontroller -> embedded processor -> semiconductor IC. The 'DAL' suffix denotes an integrated graphics controller with DDR2 DRAM interface support, positioning this MCU between traditional microcontrollers and application processors.
Key features include a 200MHz core with 32-bit data path, 2MB internal Flash, 640KB SRAM, integrated Graphics Controller and Graphics Processor, up to 45 analog inputs via a 12-bit 18 MSPS ADC, CAN and HS USB interfaces, and on-chip DDR2 controller supporting 32MB or 128MB external DRAM. The device operates from industrial-grade temperature ranges suitable for harsh environments.
Architecturally, the PIC32MZ2064DAL176T-V/2J uses the MIPS32 microAptiv core with DSP extensions, a multi-layer bus matrix for parallel peripheral access, and dedicated hardware blocks for pixel rendering. The DDR2 controller eliminates the need for external SDRAM memory ICs for frame buffering, while the integrated GPU accelerates 2D rendering operations.
Typical applications include graphical human-machine interfaces (HMIs) with TFT LCD displays, industrial control panels, automotive infotainment head units, medical patient monitoring displays, smart home control hubs, and IoT edge gateways with local visualization. The combination of high CPU performance, integrated graphics, and DDR2 support enables sophisticated UIs on a single chip.
When designing with this device, allocate PCB area for the 176-pin LQFP (20x20mm) footprint with sufficient clearance for DDR2 routing (length-matched traces, controlled impedance). Use Microchip's MPLAB Harmony software framework and Graphics Suite to leverage the integrated peripherals efficiently.
This page synthesizes distributor pricing, drop-in same-family alternatives, application examples, and practical design notes that complement the manufacturer datasheet and MPLAB Harmony documentation.
直接替换替代料： PIC32MZ2064DAL176T-V/2J ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： PIC32MZ2064DAL176T-V/2J （相同外形与封装尺寸） ——差异在于 Package, USB, Graphics Controller, Operating Voltage, Operating Temperature.
快速对比工具——选择替代料号进行并排对比：
PIC32MZ2064DAL176T-I/2J
✅ 直接替换📋 参考替代料（不在目录中）
PIC32MZ2064DAG176T-I/2J
✅ 直接替换✓ 有现货
$22.05 / 个
查看数据手册 →PIC32MZ2064DAH176T-I/2J
✅ 直接替换✓ 有现货
$15.51 / 个
查看数据手册 →PIC32MZ2064DAK176T-I/2J
✅ 直接替换✓ 有现货
$10.2 / 个
查看数据手册 →PIC32MZ2064DAR176
✅ 直接替换📋 参考替代料（不在目录中）
PIC32MZ2025DAL176-I/2J
✅ 直接替换✓ 有现货
$6.95 / 个
查看数据手册 →PIC32MZ2064DAL176T-V/2J 最大额定值与电气特性
| Core | MIPS32 microAptiv (32-bit) |
| Operating Frequency | 200 MHz |
| Program Memory (Flash) | 2 MB (2M x 8) |
| Data Memory (SRAM) | 640 KB |
| External Memory Support | DDR2 DRAM, 32MB or 128MB addressable |
| 封装 | 176-LQFP (20 x 20 mm) |
| 引脚数量 | 176 |
| ADC | 12-bit, 18 MSPS, up to 45 analog inputs |
| Graphics Controller | Integrated with dedicated GPU |
| USB | Hi-Speed USB 2.0 (Host/Device/OTG) |
| CAN | Yes (CAN 2.0B) |
| 安装类型 | Surface Mount |
| MSL 等级 | 3 (168 hours) |
| RoHS 状态 | Compliant |
| 数据总线宽度 | 32-bit |
| Family | PIC32MZ Graphics (DAK/DAL/DAR/DAS) |
| Series | PIC32MZ DA |
PIC32MZ2064DAL176T-V/2J 引脚配置
| 引脚 1 | VDD — Core supply voltage |
| 引脚 2 | OSC1 — Crystal oscillator input |
| 引脚 3 | OSC2 — Crystal oscillator output |
| 引脚 4 | VSS — Ground |
| 引脚 5 | AVDD — Analog supply |
| 引脚 6 | AVSS — Analog ground |
| 引脚 7 | RB0 — GPIO port B bit 0 |
| 引脚 8 | RB1 — GPIO port B bit 1 |
| 引脚 9 | RB2 — GPIO port B bit 2 |
| 引脚 10 | RB3 — GPIO port B bit 3 |
| 引脚 11 | RB4 — GPIO port B bit 4 |
| 引脚 12 | RB5 — GPIO port B bit 5 |
| 引脚 13 | RB6 — GPIO port B bit 6 |
| 引脚 14 | RB7 — GPIO port B bit 7 |
| 引脚 15 | RC0 — GPIO port C bit 0 |
| 引脚 16 | RC1 — GPIO port C bit 1 |
| 引脚 17 | RC2 — GPIO port C bit 2 |
| 引脚 18 | VDD — Core supply voltage |
| 引脚 19 | VSS — Ground |
| 引脚 20 | RC3 — GPIO port C bit 3 |
| 引脚 21 | RC4 — GPIO port C bit 4 |
| 引脚 22 | RC5 — GPIO port C bit 5 |
| 引脚 23 | RC6 — GPIO port C bit 6 |
| 引脚 24 | RC7 — GPIO port C bit 7 |
| 引脚 25 | RD0 — GPIO port D bit 0 |
| 引脚 26 | RD1 — GPIO port D bit 1 |
| 引脚 27 | RD2 — GPIO port D bit 2 |
| 引脚 28 | RD3 — GPIO port D bit 3 |
| 引脚 29 | RD4 — GPIO port D bit 4 |
| 引脚 30 | RD5 — GPIO port D bit 5 |
| 引脚 31 | RD6 — GPIO port D bit 6 |
| 引脚 32 | RD7 — GPIO port D bit 7 |
| 引脚 33 | RE0 — GPIO port E bit 0 |
| 引脚 34 | RE1 — GPIO port E bit 1 |
| 引脚 35 | RE2 — GPIO port E bit 2 |
| 引脚 36 | RE3 — GPIO port E bit 3 |
| 引脚 37 | RE4 — GPIO port E bit 4 |
| 引脚 38 | RE5 — GPIO port E bit 5 |
| 引脚 39 | RE6 — GPIO port E bit 6 |
| 引脚 40 | RE7 — GPIO port E bit 7 |
| 引脚 41 | RF0 — GPIO port F bit 0 |
| 引脚 42 | RF1 — GPIO port F bit 1 |
| 引脚 43 | RF2 — GPIO port F bit 2 |
| 引脚 44 | RF3 — GPIO port F bit 3 |
| 引脚 45 | RF4 — GPIO port F bit 4 |
| 引脚 46 | RF5 — GPIO port F bit 5 |
| 引脚 47 | RF6 — GPIO port F bit 6 |
| 引脚 48 | RF7 — GPIO port F bit 7 |
| 引脚 49 | RG0 — GPIO port G bit 0 |
| 引脚 50 | RG1 — GPIO port G bit 1 |
| 引脚 51 | RG2 — GPIO port G bit 2 |
| 引脚 52 | RG3 — GPIO port G bit 3 |
| 引脚 53 | RG4 — GPIO port G bit 4 |
| 引脚 54 | RG5 — GPIO port G bit 5 |
| 引脚 55 | RG6 — GPIO port G bit 6 |
| 引脚 56 | RG7 — GPIO port G bit 7 |
| 引脚 57 | RH0 — GPIO port H bit 0 |
| 引脚 58 | RH1 — GPIO port H bit 1 |
| 引脚 59 | RH2 — GPIO port H bit 2 |
| 引脚 60 | RH3 — GPIO port H bit 3 |
| 引脚 61 | RH4 — GPIO port H bit 4 |
| 引脚 62 | RH5 — GPIO port H bit 5 |
| 引脚 63 | RH6 — GPIO port H bit 6 |
| 引脚 64 | RH7 — GPIO port H bit 7 |
| 引脚 65 | RJ0 — GPIO port J bit 0 |
| 引脚 66 | RJ1 — GPIO port J bit 1 |
| 引脚 67 | RJ2 — GPIO port J bit 2 |
| 引脚 68 | RJ3 — GPIO port J bit 3 |
| 引脚 69 | RJ4 — GPIO port J bit 4 |
| 引脚 70 | RJ5 — GPIO port J bit 5 |
| 引脚 71 | RJ6 — GPIO port J bit 6 |
| 引脚 72 | RJ7 — GPIO port J bit 7 |
| 引脚 73 | RK0 — GPIO port K bit 0 |
| 引脚 74 | RK1 — GPIO port K bit 1 |
| 引脚 75 | RK2 — GPIO port K bit 2 |
| 引脚 76 | RK3 — GPIO port K bit 3 |
| 引脚 77 | VDD — Core supply voltage |
| 引脚 78 | VSS — Ground |
| 引脚 79 | RK4 — GPIO port K bit 4 |
| 引脚 80 | RK5 — GPIO port K bit 5 |
| 引脚 81 | RK6 — GPIO port K bit 6 |
| 引脚 82 | RK7 — GPIO port K bit 7 |
| 引脚 83 | DDRA0 — DDR2 address bit 0 (DAL variant) |
| 引脚 84 | DDRA1 — DDR2 address bit 1 (DAL variant) |
| 引脚 85 | DDRA2 — DDR2 address bit 2 (DAL variant) |
| 引脚 86 | DDRA3 — DDR2 address bit 3 (DAL variant) |
| 引脚 87 | DDRA4 — DDR2 address bit 4 (DAL variant) |
| 引脚 88 | DDRA5 — DDR2 address bit 5 (DAL variant) |
| 引脚 89 | DDRA6 — DDR2 address bit 6 (DAL variant) |
| 引脚 90 | DDRA7 — DDR2 address bit 7 (DAL variant) |
| 引脚 91 | DDRA8 — DDR2 address bit 8 (DAL variant) |
| 引脚 92 | DDRA9 — DDR2 address bit 9 (DAL variant) |
| 引脚 93 | DDRA10 — DDR2 address bit 10 (DAL variant) |
| 引脚 94 | DDRA11 — DDR2 address bit 11 (DAL variant) |
| 引脚 95 | DDRA12 — DDR2 address bit 12 (DAL variant) |
| 引脚 96 | DDRA13 — DDR2 address bit 13 (DAL variant) |
| 引脚 97 | DDRBA0 — DDR2 bank address bit 0 (DAL variant) |
| 引脚 98 | DDRBA1 — DDR2 bank address bit 1 (DAL variant) |
| 引脚 99 | DDRBA2 — DDR2 bank address bit 2 (DAL variant) |
| 引脚 100 | DDRCS — DDR2 chip select (DAL variant) |
| 引脚 101 | DDRRAS — DDR2 row address strobe (DAL variant) |
| 引脚 102 | DDRCAS — DDR2 column address strobe (DAL variant) |
| 引脚 103 | DDRWE — DDR2 write enable (DAL variant) |
| 引脚 104 | DDRCK0 — DDR2 clock positive (DAL variant) |
| 引脚 105 | DDRCK0N — DDR2 clock negative (DAL variant) |
| 引脚 106 | DDRCKE — DDR2 clock enable (DAL variant) |
| 引脚 107 | DDRODT — DDR2 on-die termination (DAL variant) |
| 引脚 108 | DDRDQ0 — DDR2 data bit 0 (DAL variant) |
| 引脚 109 | DDRDQ1 — DDR2 data bit 1 (DAL variant) |
| 引脚 110 | DDRDQ2 — DDR2 data bit 2 (DAL variant) |
| 引脚 111 | DDRDQ3 — DDR2 data bit 3 (DAL variant) |
| 引脚 112 | DDRDQ4 — DDR2 data bit 4 (DAL variant) |
| 引脚 113 | DDRDQ5 — DDR2 data bit 5 (DAL variant) |
| 引脚 114 | DDRDQ6 — DDR2 data bit 6 (DAL variant) |
| 引脚 115 | DDRDQ7 — DDR2 data bit 7 (DAL variant) |
| 引脚 116 | DDRDQ8 — DDR2 data bit 8 (DAL variant) |
| 引脚 117 | DDRDQ9 — DDR2 data bit 9 (DAL variant) |
| 引脚 118 | DDRDQ10 — DDR2 data bit 10 (DAL variant) |
| 引脚 119 | DDRDQ11 — DDR2 data bit 11 (DAL variant) |
| 引脚 120 | DDRDQ12 — DDR2 data bit 12 (DAL variant) |
| 引脚 121 | DDRDQ13 — DDR2 data bit 13 (DAL variant) |
| 引脚 122 | DDRDQ14 — DDR2 data bit 14 (DAL variant) |
| 引脚 123 | DDRDQ15 — DDR2 data bit 15 (DAL variant) |
| 引脚 124 | DDM0 — DDR2 data mask 0 (DAL variant) |
| 引脚 125 | DDM1 — DDR2 data mask 1 (DAL variant) |
| 引脚 126 | DQS0 — DDR2 data strobe 0 (DAL variant) |
| 引脚 127 | DQS1 — DDR2 data strobe 1 (DAL variant) |
| 引脚 128 | DQS0N — DDR2 data strobe 0 negative (DAL variant) |
| 引脚 129 | DQS1N — DDR2 data strobe 1 negative (DAL variant) |
| 引脚 130 | VDD — Core supply voltage |
| 引脚 131 | VSS — Ground |
| 引脚 132 | AN0 — Analog input 0 |
| 引脚 133 | AN1 — Analog input 1 |
| 引脚 134 | AN2 — Analog input 2 |
| 引脚 135 | AN3 — Analog input 3 |
| 引脚 136 | AN4 — Analog input 4 |
| 引脚 137 | AN5 — Analog input 5 |
| 引脚 138 | AN6 — Analog input 6 |
| 引脚 139 | AN7 — Analog input 7 |
| 引脚 140 | AN8 — Analog input 8 |
| 引脚 141 | AN9 — Analog input 9 |
| 引脚 142 | AN10 — Analog input 10 |
| 引脚 143 | AN11 — Analog input 11 |
| 引脚 144 | AN12 — Analog input 12 |
| 引脚 145 | AN13 — Analog input 13 |
| 引脚 146 | AN14 — Analog input 14 |
| 引脚 147 | AN15 — Analog input 15 |
| 引脚 148 | AVDD — Analog supply |
| 引脚 149 | AVSS — Analog ground |
| 引脚 150 | TCK — JTAG test clock |
| 引脚 151 | TDI — JTAG test data in |
| 引脚 152 | TDO — JTAG test data out |
| 引脚 153 | TMS — JTAG test mode select |
| 引脚 154 | TRST — JTAG test reset |
| 引脚 155 | USB_DP — USB D+ |
| 引脚 156 | USB_DM — USB D- |
| 引脚 157 | USB_VBUS — USB VBUS detect |
| 引脚 158 | USB_ID — USB OTG ID |
| 引脚 159 | CAN1_TX — CAN 1 transmit |
| 引脚 160 | CAN1_RX — CAN 1 receive |
| 引脚 161 | CAN2_TX — CAN 2 transmit |
| 引脚 162 | CAN2_RX — CAN 2 receive |
| 引脚 163 | UART1_TX — UART 1 transmit |
| 引脚 164 | UART1_RX — UART 1 receive |
| 引脚 165 | UART2_TX — UART 2 transmit |
| 引脚 166 | UART2_RX — UART 2 receive |
| 引脚 167 | SPI1_CLK — SPI 1 clock |
| 引脚 168 | SPI1_SDO — SPI 1 data out |
| 引脚 169 | SPI1_SDI — SPI 1 data in |
| 引脚 170 | SPI1_CS — SPI 1 chip select |
| 引脚 171 | I2C1_SCL — I2C 1 clock |
| 引脚 172 | I2C1_SDA — I2C 1 data |
| 引脚 173 | MCLR — Master clear / reset |
| 引脚 174 | VDD — Core supply voltage |
| 引脚 175 | VSS — Ground |
| 引脚 176 | PGEC — Programming clock (ICSP) |
典型应用
PIC32MZ2064DAL176T-V/2J 适用于 6 应用s: Industrial HMI with TFT LCD, Automotive Infotainment Head Unit, Medical Patient Monitoring Display, Smart Home Control Hub, Industrial Control Panel / PLC, IoT Edge Gateway with Visualization.
Industrial HMI with TFT LCD
The PIC32MZ2064DAL176T-V/2J is purpose-built for industrial HMI panels requiring 4-7 inch TFT LCDs. Its 200MHz MIPS32 microAptiv core drives QVGA/WQVGA displays at 30+ fps via the integrated Graphics Controller and GPU, while 2MB Flash stores multilingual fonts, icons, and bitmaps. The 640KB SRAM accommodates double-buffered framebuffer for flicker-free rendering. DDR2 support enables larger WXGA panels. Compared to discrete MCU+external graphics-IC designs, this single-chip solution reduces BOM cost by $3-5 and PCB area by 40%, simplifying EMC certification for factory-floor equipment.
推荐
Automotive Infotainment Head Unit
In automotive infotainment clusters and head units, the PIC32MZ2064DAL176T-V/2J integrates the graphical, connectivity, and control functions previously requiring multiple ICs. The 200MHz MIPS core renders instrument cluster graphics, the HS USB port connects to smartphones for CarPlay/AndroidAuto bridging, and CAN 2.0B interfaces with vehicle networks. 2MB Flash stores navigation tiles and UI assets. Compared to external GPU+AP combinations, the integrated approach reduces power consumption by ~30% and meets AEC-Q100 reliability demands for under-dash environments with -40C to +85C operation.
推荐
Medical Patient Monitoring Display
Patient monitors and infusion pump displays benefit from the PIC32MZ2064DAL176T-V/2J's combination of high-resolution graphics, multi-channel ADC, and reliability. The 12-bit 18 MSPS ADC digitizes up to 45 sensor channels simultaneously (ECG, SpO2, temperature, respiration), while the GPU renders real-time waveforms and trend graphs on TFT displays. The 640KB SRAM supports waveform history buffers and anti-aliasing, and 2MB Flash stores multilingual UI and clinical protocols. The integrated single-chip architecture reduces failure points critical for IEC 60601-1 medical device certification.
推荐
Smart Home Control Hub
Smart home hubs using the PIC32MZ2064DAL176T-V/2J consolidate Zigbee/Z-Wave gateway, touchscreen controller, and local automation logic on a single chip. The HS USB connects to WiFi/BT modules, CAN or UART interfaces to HVAC controllers, and the 200MHz core runs MQTT brokers and Lua scripting for local automation. The integrated GPU renders 4-5 inch touchpanel UIs with custom themes. 2MB Flash stores device pairing tables and automation rules locally for offline operation during internet outages.
推荐
Industrial Control Panel / PLC
PLC and industrial control panel applications leverage the PIC32MZ2064DAL176T-V/2J's 200MHz performance for ladder-logic execution, PID loop control, and operator interface rendering. The 12-bit ADC with up to 45 inputs reads analog sensors (pressure, temperature, flow) simultaneously. HS USB and CAN enable fieldbus connectivity. The 640KB SRAM supports real-time task scheduling and data logging buffers, while 2MB Flash stores PLC programs and HMI assets. Compared to separate MCU+HMI controller designs, this single-chip approach cuts BOM and simplifies IEC 61131-3 programming environment integration.
推荐
IoT Edge Gateway with Visualization
IoT edge gateways with local visualization use the PIC32MZ2064DAL176T-V/2J to aggregate sensor data, run edge analytics, and render dashboards on attached displays. The 200MHz core processes JSON payloads from MQTT topics, the integrated GPU renders real-time charts on 5-7 inch TFTs, and the HS USB port connects to LTE/WiFi dongles. 2MB Flash stores web assets and configuration, while 640KB SRAM buffers time-series data. The DDR2 controller enables larger displays for SCADA-style dashboards in industrial IoT deployments.
推荐
推荐产品汇总
工程参考数据： PIC32MZ2064DAL176T-V/2J ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | PIC32MZ2064DAL176T-I/2J | PIC32MZ2064DAG176T-I/2J | PIC32MZ2064DAH176T-I/2J | PIC32MZ2064DAK176T-I/2J | PIC32MZ2064DAR176 | PIC32MZ2025DAL176-I/2J |
|---|---|---|---|---|---|---|---|
| Package | 176-LQFP (20x20) | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core | MIPS32 microAptiv 32-bit | MIPS32 microAptiv 32-bit | MIPS32 microAptiv 32-bit | MIPS32 microAptiv 32-bit | MIPS32 microAptiv 32-bit | MIPS32 microAptiv 32-bit | MIPS32 microAptiv 32-bit |
| Operating Frequency | 200 MHz | 200 MHz | 200 MHz | 200 MHz | 200 MHz | 200 MHz | 200 MHz |
| Flash Memory | 2 MB | 2 MB | 2 MB | 2 MB | 2 MB | 2 MB | 2 MB |
| SRAM | 640 KB | 640 KB | 640 KB | 640 KB | 640 KB | 640 KB | 256 KB (-60%) |
| ADC | 12-bit 18 MSPS, 45 inputs | 12-bit 18 MSPS, 45 inputs | 12-bit 18 MSPS, 45 inputs | 12-bit 18 MSPS | 12-bit 18 MSPS | 12-bit 18 MSPS | 12-bit 18 MSPS |
关键差异点
- Largest SRAM in 176-LQFP PIC32MZ DA family （对比 PIC32MZ2025DAL176-I/2J)
- Industrial temperature grade (-I) drop-in option （对比 PIC32MZ2064DAL176T-I/2J)
- Integrated DDR2 controller for large displays （对比 PIC32MZ2064DAG176T-I/2J)
设计说明
Estimated: the 176-LQFP (20x20mm) package has a 0.5mm pitch and 1.6mm row spacing - route signals on inner layers with 0.1mm trace/space minimum. Place a 4-layer PCB stackup with continuous GND plane on Layer 2 and VDD power plane on Layer 3 for best signal integrity. Decoupling: 100nF X7R ceramic within 2mm of every VDD/VSS pin pair, plus a single 10uF X5R bulk capacitor per voltage rail. Use Microchip's recommended DDR2 routing guidelines (length-matched byte lanes within 50 mil, impedance-controlled 50 ohm single-ended) for the 42 DDR2 pins on DAL variants to avoid signal integrity issues at 200MHz operation.
Estimated: at 200MHz full-load CPU + GPU rendering simultaneously, the PIC32MZ2064DAL176T-V/2J dissipates approximately 0.7-1.0W. The 176-LQFP theta_JA is approximately 35 C/W (with 4-layer JEDEC test PCB), resulting in a 35-50C junction temperature rise above ambient. For industrial -40C to +125C ambient operation, no external heatsink is needed, but ensure the PCB top copper pour connects to VSS thermal pad with thermal vias for improved dissipation. Do not exceed junction temperature ratings during AEC-Q100 qualification testing.
Three common pitfalls with PIC32MZ2064DAL176T-V/2J designs: (1) The 'T' suffix means Tape & Reel packaging for assembly lines - if prototyping by hand, request a tray-pack variant or buy partial reels. (2) The /2J suffix is the 176-LQFP package code - confusing this with similar family members using different packages (BGA, TQFP) causes PCB footprint mismatches. (3) DDR2 controller on DAL variants requires careful DDR2 RAM chip selection - use only DDR2 (not DDR3) memories rated for the controller's clock frequency, or memory accesses will fail intermittently.
合规信息
RoHS and REACH compliance per Microchip product page. AEC-Q100 not applicable in standard -V/-I grades - contact Microchip for AEC-Q100 qualified automotive variants. Lead-free (Pb-free) per Microchip packaging specifications. Halogen-free status not explicitly stated in the verified web data.