TDA8763M/5/C4 - 10-bit 50 MSPS ADC | NXP Semiconductors
料号： TDA8763M/5/C4 ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.2 | $162.00 |
| 100 | $13.4 | $1,340.00 |
| 500 | $11.05 | $5,525.00 |
| 1,000 | $9.8 | $9,800.00 |
TDA8763M/5/C4 概述
An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that quantises a continuous-time analog input into a discrete digital code. The sigma-delta architecture used here oversamples the input and uses noise shaping to push quantisation noise out of the signal band, yielding high effective resolution at moderate analog bandwidths. Within the broader hierarchy, the TDA8763M belongs to the data converter family, which sits alongside amplifiers, interface ICs, and clock & timing devices in the mixed-signal/analog IC category.
Key differentiating features of the TDA8763M/5/C4 include DC-sampling capability, an In-Range (IR) CMOS output that flags over-range conditions without an extra comparator, TTL/CMOS-compatible logic levels, and a one-clock-cycle conversion latency. The SSOP-28 footprint is a low-profile, surface-mountable shrink package well suited to multi-layer video and instrumentation PCBs.
From an architectural standpoint, the converter pairs an input sample-and-hold with an internal reference regulator to hold full-scale accuracy over the 0 °C to 70 °C commercial temperature range. The combination of high signal-to-noise ratio and DC-allowed sampling supports digitisation of baseband video, IF-stripped communications signals, and industrial control feedback loops.
Typical applications include digital video broadcast equipment, professional CCD-camera signal chains, instrumentation digitiser front ends, ultrasound and medical imaging front ends, set-top box component inputs, and industrial process control loops. The wide effective-bit count at high analog input frequencies also makes it usable for undersampled IF digitisation.
When designing with this part, place the analog and digital grounds on a split plane joined at a single point under the IC, keep analog input traces short and guarded, and reserve adequate decoupling (typically 100 nF plus 10 µF) on both AVDD and DVDD. The internal reference regulator removes the burden of external reference design but the absolute full-scale error should still be calibrated in software for production-grade systems.
This page synthesises distributor pricing, drop-in alternatives from the same SSOP-28 footprint, and practical design notes not collected in a single place in the manufacturer datasheet.
直接替换替代料： TDA8763M/5/C4 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： TDA8763M/5/C4 （相同外形与封装尺寸） ——差异在于 Resolution, Architecture, Number of Channels, Package, Mounting Type.
快速对比工具——选择替代料号进行并排对比：
TDA8763M/5/C4,112
✅ 直接替换📋 参考替代料（不在目录中）
TDA8763M/5/C4,118
✅ 直接替换📋 参考替代料（不在目录中）
TDA8763AM/3/C4
✅ 直接替换✓ 有现货
$6.5 / 个
查看数据手册 →PCM4202IDBREP
✅ 直接替换✓ 有现货
$7.95 / 个
查看数据手册 →MX7575SQ/883B
✅ 直接替换✓ 有现货
$10.75 / 个
查看数据手册 →TDA8763M/5/C4 最大额定值与电气特性
| 分辨率 | 10 bit |
| 采样率 | Up to 50 MSPS |
| Number of Input Channels | 1 |
| Architecture | Sigma-Delta |
| Conversion Latency | 1 clock cycle |
| DC Sampling | Allowed |
| Effective Number of Bits | 9.3 ENOB at 4.43 MHz FS input, fclk = 40 MHz |
| Missing Codes | None guaranteed |
| Output Interface | Parallel CMOS (TTL/CMOS levels) |
| In-Range (IR) Output | Yes (CMOS) |
| Internal Reference Regulator | Yes (on-chip) |
| 封装 | 28-SSOP (5.30 mm body width) |
| 工作温度范围 | 0 °C to 70 °C (commercial) |
| 安装类型 | Surface Mount |
| RoHS 状态 | Compliant |
TDA8763M/5/C4 引脚配置
| 引脚 1 | VCCA — Analog supply voltage |
| 引脚 2 | AGND — Analog ground |
| 引脚 3 | VIN — Analog input |
| 引脚 4 | AGND — Analog ground |
| 引脚 5 | VREF — Reference voltage (internal regulator output) |
| 引脚 6 | AGND — Analog ground |
| 引脚 7 | CLOCK — Conversion clock input |
| 引脚 8 | DGND — Digital ground |
| 引脚 9 | VCCD — Digital supply voltage |
| 引脚 10 | OE — Output enable (active logic level per datasheet) |
| 引脚 11 | IR — In-Range CMOS flag output |
| 引脚 12 | D9 — Data output bit 9 (MSB) |
| 引脚 13 | D8 — Data output bit 8 |
| 引脚 14 | D7 — Data output bit 7 |
| 引脚 15 | D6 — Data output bit 6 |
| 引脚 16 | D5 — Data output bit 5 |
| 引脚 17 | D4 — Data output bit 4 |
| 引脚 18 | D3 — Data output bit 3 |
| 引脚 19 | D2 — Data output bit 2 |
| 引脚 20 | D1 — Data output bit 1 |
| 引脚 21 | D0 — Data output bit 0 (LSB) |
| 引脚 22 | NC — Not connected (per datasheet) |
| 引脚 23 | NC — Not connected (per datasheet) |
| 引脚 24 | VCCD — Digital supply voltage |
| 引脚 25 | DGND — Digital ground |
| 引脚 26 | AGND — Analog ground |
| 引脚 27 | VCCA — Analog supply voltage |
| 引脚 28 | NC — Not connected (per datasheet) |
典型应用
TDA8763M/5/C4 适用于 6 应用s: Standard-Definition Digital Video Digitiser, Professional CCD Camera Signal Chain, Instrumentation and Oscilloscope Front End, Ultrasound and Medical Imaging Front End, Set-Top Box Component Video Input, Industrial Process Control Feedback Loop.
Standard-Definition Digital Video Digitiser
The TDA8763M/5/C4 suits standard-definition video digitisation thanks to its 10-bit resolution at 50 MSPS and 9.3 ENOB at 4.43 MHz full-scale analog input, which matches the CCIR-601 sampling rate used in SDTV broadcast equipment. With DC sampling allowed and TTL/CMOS parallel output, the part drops directly into legacy SDI, MPEG-2 encoder, and broadcast monitor front-end designs without extra glue logic. The internal reference regulator removes the need for an external bandgap reference, reducing board area and BOM cost in multi-input video routers. Designers should allocate separate analog and digital ground planes joined at a single point under the IC to preserve SNR at the 4.43 MHz analog input bandwidth.
推荐
Professional CCD Camera Signal Chain
In CCD-based industrial and broadcast cameras, the TDA8763M/5/C4 digitises the analog CCD output with 10-bit precision at sample rates up to 50 MSPS, supporting both baseband and moderately oversampled IF chains. The one-clock-cycle conversion latency simplifies timing alignment between pixel clock and digitised data, while the In-Range CMOS flag warns the downstream processor of over-range CCD highlights without an extra comparator. The 28-SSOP footprint keeps the analog front-end section compact on multi-channel camera PCBs. Place 100 nF plus 10 µF decoupling on both AVDD and DVDD, and route analog input traces with controlled impedance to maintain ENOB at high pixel clock rates.
推荐
Instrumentation and Oscilloscope Front End
Bench-top and portable oscilloscopes that target a 50 MSPS real-time sample rate can use the TDA8763M/5/C4 as a single-channel digitiser front end, leveraging 10-bit resolution and a guaranteed no-missing-codes output to give repeatable waveform capture. The sigma-delta architecture oversamples the analog input, pushing quantisation noise above the signal band and yielding 9.3 effective bits at 4.43 MHz full-scale input. Internal reference regulation maintains gain accuracy over the 0 °C to 70 °C commercial range without an external precision reference, simplifying the analog front-end bill of materials. Add a front-end amplifier with bandwidth above the ADC sample rate and ensure the clock source has sub-50 ps jitter for full ENOB.
推荐
Ultrasound and Medical Imaging Front End
Low-end ultrasound and medical imaging front ends benefit from the TDA8763M/5/C4's combination of 50 MSPS sampling, DC-allowed sampling, and internal reference regulation. The 10-bit dynamic range is sufficient for B-mode envelope detection and pre-beamformer digitisation in compact portable ultrasound carts where the small 28-SSOP footprint and modest power dissipation are advantageous. The In-Range flag is convenient for chaining multiple ADCs in time-multiplexed arrays. Note that this part lacks the medical-grade certification of newer dedicated ultrasound ADCs, so it is best reserved for non-life-support imaging peripherals.
推荐
Set-Top Box Component Video Input
Set-top boxes with component YPbPr or RGB analog video inputs require 50 MSPS-class 10-bit ADCs per channel, and the TDA8763M/5/C4 was designed for exactly this use case in legacy designs. Three TDA8763M/5/C4 devices can digitise Y, Pb, and Pr simultaneously with matched latency, and the CMOS parallel output simplifies interfacing to MPEG-2 encoder ASICs of the era. The internal reference regulator eliminates a per-channel external reference, reducing system cost. For new designs, modern integrated triple-video ADCs in smaller packages are usually preferred, but the TDA8763M/5/C4 remains the canonical choice for legacy replication.
推荐
Industrial Process Control Feedback Loop
Industrial process control boards can use the TDA8763M/5/C4 to digitise position-feedback sensors, strain-gauge amplifiers, and 4-20 mA loop receivers at sample rates well above the loop bandwidth, providing headroom for digital filtering. The 10-bit resolution, DC-allowed sampling, and 0 °C to 70 °C operating range are sufficient for closed-loop motor control and PID feedback in factory automation hardware. The TTL/CMOS output interfaces directly to legacy microcontrollers and DSPs without level shifters. Although obsolete, the part remains widely available in service stock for installed industrial bases; verify long-term availability before committing to new factory runs.
推荐
推荐产品汇总
工程参考数据： TDA8763M/5/C4 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | TDA8763M/5/C4,112 | TDA8763M/5/C4,118 | TDA8763AM/3/C4 | PCM4202IDBREP | MX7575SQ/883B |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | Texas Instruments | Maxim Integrated |
| Package | 28-SSOP | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same | SSOP-28 (DB) - same | SO-28 wide body - footprint-class same, verify pinout |
| Resolution | 10 bit | 10 bit | 10 bit | 8 bit | 24 bit | 10 bit |
| Sampling Rate | 50 MSPS max | 50 MSPS max | 50 MSPS max | Lower (per datasheet) | Lower (audio rate) | Lower (per datasheet) |
| Architecture | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta | Delta-Sigma (audio) | SAR |
| Output Interface | Parallel CMOS (TTL/CMOS levels) | Parallel CMOS | Parallel CMOS | Parallel CMOS | Serial (audio) | Parallel |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Active (check TI) | Obsolete (military part) |
关键差异点
- Integrated reference regulator eliminates external bandgap （对比 MX7575SQ/883B)
- DC sampling capability simplifies downstream signal chain （对比 PCM4202IDBREP)
- One-clock-cycle conversion latency （对比 TDA8763AM/3/C4)
设计说明
Use a split ground plane with analog and digital sections joined at a single point directly under the IC's AGND/DGND pins. This prevents digital switching noise from coupling into the analog input path and degrading ENOB at the 4.43 MHz full-scale input bandwidth. Keep analog input traces short, guarded, and routed over a continuous analog ground pour on the layer directly beneath.
Decouple both AVDD and DVDD supplies with a 100 nF ceramic capacitor placed within 2 mm of each supply pin, plus a 10 µF tantalum or ceramic bulk capacitor on each rail. The internal reference regulator does not eliminate the need for low-impedance power, since clock jitter from noisy supplies propagates directly into SNR. Estimated: with fclk = 40 MHz, SNR at 4.43 MHz input is preserved only if supply ripple is below 50 mVpp; verify with a scope on the analog supply pin.
Do not substitute the TDA8763AM/3/C4 (8-bit) for the TDA8763M/5/C4 (10-bit) without accepting a 2 LSB loss of vertical resolution. Both share the SSOP-28 footprint but the 8-bit device will quantise a 10-bit signal coarsely and visible banding may appear in video applications. Verify the bit width field on every reel label before SMT placement.
合规信息
RoHS and lead-free compliance confirmed via third-party distributor listings. REACH, halogen-free, and conflict-minerals status not explicitly stated in verified data and marked unknown. Part is not AEC-Q100 qualified (commercial 0-70 °C grade only).