TPS65220CRSLR - 2.5-5.5V PMIC, 3 Buck + 4 LDO | TI
料号： TPS65220CRSLR ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $5.2 | $5.20 |
| 10 | $4.65 | $46.50 |
| 100 | $4.1 | $410.00 |
| 500 | $3.65 | $1,825.00 |
| 1,000 | $3.2 | $3,200.00 |
TPS65220CRSLR 概述
Key features include three synchronous buck converters with internal MOSFETs, four LDOs that can be used as post-regulation stages or independent supplies, and a wide -40C to +125C ambient operating temperature range for automotive-grade reliability. The PMIC integrates a sequencer, I2C interface for dynamic voltage scaling, and power-good indicators to coordinate multi-rail system startup.
As a PMIC, this device belongs to the broader category of power management ICs that consolidate multiple regulators, supervisors, and control logic into a single chip. PMICs replace discrete regulator designs to reduce board area, BOM count, and design complexity in multi-rail SoC systems. They typically include factory-programmed default voltages, fault protection, and sequencing logic optimized for a specific processor family.
The TPS65220 is characterized across -40C to +125C ambient, making it an excellent choice for industrial and automotive applications. The three synchronous step-down DC-DC converters share an internal compensation network, while the four LDOs provide low-noise rails for analog or memory subsystems. A built-in I2C interface allows the host processor to adjust output voltages, enable or disable rails, and read status flags.
Typical applications include Sitara AM64x and AM243x processor power rails, ARM Cortex-A53 SoC boards, FPGA-based industrial control modules, vision processors, and infotainment head units. The 2.2 MHz switching frequency (typical for the buck channels) enables small external inductors and capacitors, helping meet tight PCB area constraints.
When designing with this device, ensure that the input bulk capacitor handles the worst-case buck inrush current and that the thermal pad is soldered to a sufficient copper pour. Because each output rail has programmable default voltages set by factory NVM, confirm the exact NVM configuration of the TPS65220CRSLR suffix against your SoC power-up sequence.
This page synthesizes distributor pricing, parametric alternatives, and design notes drawn from the TI datasheet, providing practical guidance not consolidated in the manufacturer product page.
直接替换替代料： TPS65220CRSLR ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： TPS65220CRSLR （相同外形与封装尺寸） ——差异在于 Operating Temperature Range, Package, Topology.
快速对比工具——选择替代料号进行并排对比：
TPS65220CRSLT
✅ 直接替换📋 参考替代料（不在目录中）
TPS65220RSLR
✅ 直接替换📋 参考替代料（不在目录中）
TPS6522053RHBR
✅ 直接替换📋 参考替代料（不在目录中）
TPS65222C5RAHRQ1
✅ 直接替换📋 参考替代料（不在目录中）
TPS65220CRSLR 最大额定值与电气特性
| 功能 | Power Management IC (PMIC) |
| 拓扑 | 3x Synchronous Buck + 4x LDO |
| 输入电压范围 | 2.5 V to 5.5 V |
| 输出数量 | 7 total (3 Buck + 4 LDO) |
| 开关频率 | 2.2 MHz (typical) |
| LDO Output Count | 4 |
| 接口 | I2C |
| 工作温度范围 | -40 C to +125 C |
| 封装 | VQFN-48 (RSL) 6x6 mm |
| 安装类型 | Surface Mount |
| RoHS 状态 | Compliant |
| Automotive Qualified | Yes (AEC-Q100 family) |
| Target Applications | Sitara AM64x, ARM Cortex-A53, FPGAs |
TPS65220CRSLR 引脚配置
| 引脚 1 | PVIN1 — Power input for buck converter 1 |
| 引脚 2 | PGND1 — Power ground for buck 1 |
| 引脚 3 | SW1 — Switch node for buck 1 |
| 引脚 4 | FB1 — Feedback for buck 1 |
| 引脚 5 | EN1 — Enable for buck 1 |
| 引脚 6 | PVIN2 — Power input for buck converter 2 |
| 引脚 7 | PGND2 — Power ground for buck 2 |
| 引脚 8 | SW2 — Switch node for buck 2 |
| 引脚 9 | FB2 — Feedback for buck 2 |
| 引脚 10 | EN2 — Enable for buck 2 |
| 引脚 11 | PVIN3 — Power input for buck converter 3 |
| 引脚 12 | PGND3 — Power ground for buck 3 |
| 引脚 13 | SW3 — Switch node for buck 3 |
| 引脚 14 | FB3 — Feedback for buck 3 |
| 引脚 15 | EN3 — Enable for buck 3 |
| 引脚 16 | LDO1IN — Input for LDO 1 |
| 引脚 17 | LDO1OUT — Output for LDO 1 |
| 引脚 18 | LDO2IN — Input for LDO 2 |
| 引脚 19 | LDO2OUT — Output for LDO 2 |
| 引脚 20 | LDO3IN — Input for LDO 3 |
| 引脚 21 | LDO3OUT — Output for LDO 3 |
| 引脚 22 | LDO4IN — Input for LDO 4 |
| 引脚 23 | LDO4OUT — Output for LDO 4 |
| 引脚 24 | SDA — I2C data |
| 引脚 25 | SCL — I2C clock |
| 引脚 26 | nRESET — Reset input (active low) |
| 引脚 27 | nIRQ — Interrupt output (active low) |
| 引脚 28 | PGOOD1 — Power-good for buck 1 |
| 引脚 29 | PGOOD2 — Power-good for buck 2 |
| 引脚 30 | PGOOD3 — Power-good for buck 3 |
| 引脚 31 | PGOOD_LDO — Power-good for LDO bank |
| 引脚 32 | VSYS — System voltage sense |
| 引脚 33 | REF — Internal reference bypass |
| 引脚 34 | NC — Not connected (per datasheet) |
| 引脚 35 | NC — Not connected (per datasheet) |
| 引脚 36 | NC — Not connected (per datasheet) |
| 引脚 37 | AGND — Analog ground |
| 引脚 38 | AVIN — Analog supply input |
| 引脚 39 | BST1 — Bootstrap for buck 1 high-side |
| 引脚 40 | BST2 — Bootstrap for buck 2 high-side |
| 引脚 41 | BST3 — Bootstrap for buck 3 high-side |
| 引脚 42 | VCC — Internal LDO bypass |
| 引脚 43 | PAD — Thermal pad (must be soldered to ground pour) |
| 引脚 44 | PAD — Thermal pad (must be soldered to ground pour) |
| 引脚 45 | PAD — Thermal pad (must be soldered to ground pour) |
| 引脚 46 | PAD — Thermal pad (must be soldered to ground pour) |
| 引脚 47 | PAD — Thermal pad (must be soldered to ground pour) |
| 引脚 48 | PAD — Thermal pad (must be soldered to ground pour) |
典型应用
TPS65220CRSLR 适用于 6 应用s: Sitara AM64x Processor Power Supply, ARM Cortex-A53 SoC Board Power, FPGA-Based Industrial Control Module, Automotive Infotainment Head Unit, Vision Processor and Machine Learning Edge Module, Industrial IoT Gateway.
Sitara AM64x Processor Power Supply
The TPS65220CRSLR is purpose-built for the Texas Instruments Sitara AM64x SoC family, integrating all voltage rails required by the ARM Cortex-A53 cores, peripherals, and DDR memory subsystem in a single PMIC. Designers can place the part adjacent to the SoC with input bulk and bypass capacitors to satisfy multi-rail sequencing. The 2.2 MHz switching frequency enables small inductors that fit within tight SoM layouts, while the I2C interface allows the MPU to scale voltages for power-aware workload balancing.
推荐
ARM Cortex-A53 SoC Board Power
The TPS65220CRSLR supplies ARM Cortex-A53 application processors with sequenced rails for the application CPU subsystem, GPU, and DDR. Its factory-programmed NVM defaults align with common A53 power trees, simplifying boot configuration. Designers benefit from a single IC replacing what would otherwise require 7+ discrete regulators. The -40 C to +125 C rating ensures reliability in industrial gateways and HMI panels built around A53 SoCs.
推荐
FPGA-Based Industrial Control Module
The TPS65220CRSLR powers FPGA-based industrial control modules that require low-noise core, PLL, and transceiver rails. Its three synchronous bucks provide efficient high-current rails for the FPGA core voltage, while the four LDOs deliver clean supply to PLLs, transceivers, and auxiliary analog blocks. The I2C programmable output voltages allow post-build trim of FPGA rails, and the AEC-Q100 qualification supports deployment in factory automation and process control equipment.
推荐
Automotive Infotainment Head Unit
The TPS65220CRSLR is AEC-Q100 qualified and operates across -40 C to +125 C, making it well-suited for automotive infotainment head units where Sitara AM64x or ARM Cortex-A53 SoCs drive displays, audio, and connectivity. Integrated sequencing and I2C fault reporting streamline ASIL-compliant system design, while the small 6x6 mm VQFN footprint helps meet the strict board area constraints of head-unit mainboards.
推荐
Vision Processor and Machine Learning Edge Module
The TPS65220CRSLR powers vision SoCs and edge ML accelerators that require multiple low-noise rails for camera ISP, NPU, and DRAM subsystems. The 2.2 MHz switching frequency keeps EMI outside sensitive image sensor bands, while the four LDOs provide quiet analog rails for ADC references and MIPI CSI-2 PHYs. Integrated power-good outputs simplify handshaking with camera frame-sync signals.
推荐
Industrial IoT Gateway
The TPS65220CRSLR is well-suited to industrial IoT gateways that aggregate fieldbus, Ethernet, and wireless interfaces around a Cortex-A53 application processor. The PMIC's wide input range accepts 5 V PoE-derived or 24 V industrial bus power (post-conversion), and its industrial temperature rating supports outdoor and factory-floor deployments. I2C telemetry enables predictive maintenance by reporting rail voltages and fault flags to the host.
推荐
推荐产品汇总
工程参考数据： TPS65220CRSLR ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | TPS65220CRSLT | TPS65220RSLR | TPS6522053RHBR | TPS65222C5RAHRQ1 |
|---|---|---|---|---|---|
| Package | VQFN-48 (RSL) 6x6 mm | VQFN-48 (RSL) 6x6 mm - same | VQFN-48 (RSL) 6x6 mm - same | VQFN-32 (RHB) 5x5 mm - smaller | VQFN-40 (RAH) 5x6 mm - similar |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Input Voltage Range | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V |
| Switching Frequency | 2.2 MHz | 2.2 MHz | 2.2 MHz | 2.2 MHz | 2.2 MHz / 4.4 MHz |
| Interface | I2C | I2C | I2C | I2C | I2C |
| Operating Temperature | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C |
| Automotive Grade | AEC-Q100 family | AEC-Q100 family | AEC-Q100 family | AEC-Q100 family | AEC-Q100 Q1 |
关键差异点
- Three synchronous step-down DC-DC converters with internal MOSFETs （对比 TPS6522053RHBR)
- 48-pin VQFN with full rail count vs smaller 32-pin RHBR （对比 TPS6522053RHBR)
- First-generation TPS65220 architecture tuned for Sitara AM64x （对比 TPS65222C5RAHRQ1)
设计说明
Estimated: at VIN = 5 V, all three bucks delivering 1 A each, the PMIC can dissipate 3-5 W total depending on output voltages. With a VQFN-48 package whose thermal pad must be soldered to a top-layer copper pour of at least 1 square inch, junction temperature rise stays within the 125 C limit. For multi-rail automotive loads above 4 W combined, expand the ground pour to 2 square inches and use 4-layer PCB with inner ground planes.
Place input bulk capacitors as close as possible to each PVIN pin and use a star-ground topology for AGND and PGND. Place the BST capacitors directly adjacent to their respective BSTx and SWx pins to keep high-side gate-drive loops short. Keep the feedback traces away from switching nodes; route them on the opposite side of the PCB or shield them with ground. The exposed thermal pad must be fully soldered to a continuous ground plane for both thermal and electrical performance.
Do not exceed the absolute maximum input voltage of 6 V on any PVIN/AVIN pin. Verify the NVM default voltage configuration of the CRSLR suffix matches your SoC power-up sequence before PCB layout - factory NVM settings differ between TPS65220 variants. The I2C address of the TPS65220 is set by an external resistor; ensure it does not conflict with other I2C devices on the bus. Decouple the REF pin with a 100 nF ceramic capacitor to prevent jitter on internal references.
合规信息
AEC-Q100 qualified per TI datasheet for automotive applications. RoHS and REACH compliant per TI product page.
