Texas Instruments

TPS74801DRCR - 1.5A Low-VIN LDO with Soft-Start | Texas Instruments

料号: TPS74801DRCR ✓ 量产中
有现货 1-3 个工作日内发货
0.8 V to 3.6 V Vdss 1.5 A Id 10-VSON (3x3 mm) [DRC] Package
低至 $1.18 USD / 件
最小起订量: 1 |
价格更新于: 2026-08-29
批量定价
数量 单价 小计
1 $2.15 $2.15
10 $1.93 $19.30
100 $1.64 $164.00
500 $1.38 $690.00
1,000 $1.18 $1,180.00
ℹ️ 所有价格均以 USD 计价

TPS74801DRCR 概述

The Texas Instruments TPS74801DRCR is a 1.5-A low-dropout (LDO) linear regulator designed for low-input-voltage applications. It operates from an ultra-low VIN range of 0.8 V to 5.5 V, with a separate VBIAS supply of 2.7 V to 5.5 V, and provides an adjustable output voltage from 0.8 V to 3.6 V. The device is housed in a 10-pin VSON (3x3 mm) package, offering a compact solution for space-constrained designs.

An LDO (Low-Dropout) linear regulator is a type of voltage regulator that maintains a stable output voltage even when the input voltage is very close to the output voltage. It is a subclass of linear regulators, which in turn are part of the broader voltage regulator family within power management ICs. LDOs are essential for providing clean, low-noise power rails to sensitive analog and digital circuits, especially in battery-powered and low-voltage systems.

Key features of the TPS74801DRCR include a low dropout voltage of 60 mV typical at 1.5 A (with VBIAS = 5 V), a power-good (PG) output for supply monitoring and sequencing, an enable (EN) pin with active-high logic, and programmable soft-start to control inrush current. The device also offers overcurrent and thermal protection, ensuring robust operation in demanding environments.

Technically, the TPS74801 uses a PMOS pass element with a separate bias supply, allowing ultra-low input voltage operation while maintaining low dropout. The programmable soft-start is implemented via an external capacitor on the SS pin, which sets the output slew rate during startup. This prevents output overshoot and limits inrush current with large capacitive loads, and the monotonic startup is designed for safely powering processors, FPGAs, and ASICs.

Typical applications include powering FPGAs, DSPs, and microcontrollers from low-voltage rails, as well as supplying clean voltages for audio and RF circuits. The low VIN capability makes it ideal for systems running from 1.8 V or 2.5 V rails, where traditional LDOs with higher minimum input voltages cannot operate. The PG output simplifies power sequencing in multi-rail systems.

When designing with the TPS74801DRCR, ensure the VBIAS pin is supplied between 2.7 V and 5.5 V and VIN does not exceed 5.5 V. Place input and output capacitors close to the pins, size the SS capacitor for the load capacitance, and provide adequate copper pour for thermal dissipation at high dropout.

直接替换替代料: TPS74801DRCR ——相同封装,引脚兼容。需要 PCB 改动的不同封装料号已排除。

本系列中的变体

可与以下型号直接替换的同系列型号: TPS74801DRCR (相同外形与封装尺寸) ——差异在于 Enable Pin, Output Type, Package, Soft-Start.

Texas Instruments
Enable Pin: Yes
Output Type: Adjustable positive
Package: VSON-10 (DRC) 3x3 mm
对比 TPS74801DRCR →

快速对比工具——选择替代料号进行并排对比:

TPS74801TDRCRQ1

✅ 直接替换
📦 10-VSON (3x3 mm) DRC
same TPS74801 family die and package, AEC-Q100 automotive grade

📋 参考替代料(不在目录中)

TPS74801DRCT

✅ 直接替换
📦 10-VSON (3x3 mm) DRC
identical die and package, tape-and-reel quantity suffix variant for smaller reel sizes

📋 参考替代料(不在目录中)

ℹ️ 3 个跨封装料号已隐藏——不同封装需要 PCB 改动,并非真正的直接替换。 联系我们 如果您需要跨封装建议。

TPS74801DRCR 最大额定值与电气特性

输出类型 Adjustable
输出电压范围 0.8 V to 3.6 V
最大输出电流 1.5 A
输入电压范围 0.8 V to 5.5 V
Bias Voltage Range (VBIAS) 2.7 V to 5.5 V
压差电压 60 mV typical at 1.5 A, VBIAS = 5 V
电源正常输出 Yes
使能引脚 Yes (active-high)
软启动 Programmable via SS pin, monotonic
Protection Features Overcurrent, thermal shutdown
封装 10-VSON (3x3 mm) [DRC]
安装类型 Surface Mount
RoHS 状态 Compliant

TPS74801DRCR 引脚配置

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
引脚 1 EN — Enable input, active high
引脚 2 SS — Soft-start programming capacitor
引脚 3 FB — Feedback for adjustable output
引脚 4 PG — Power good output (open drain)
引脚 5 GND — Ground
引脚 6 VBIAS — Bias supply input, 2.7 V to 5.5 V
引脚 7 IN — Input supply, 0.8 V to 5.5 V
引脚 8 OUT — Regulated output, 1.5 A
引脚 9 OUT — Regulated output (paralleled)
引脚 10 GND (Pad) — Thermal pad / ground connection

典型应用

TPS74801DRCR 适用于 6 应用s: FPGA Core and I/O Power, DSP and Processor Power Supplies, Low-VIN Point-of-Load Regulation, ASIC and Noise-Sensitive Digital Load Power, Multi-Rail Power Sequencing Systems, Industrial and Test Equipment Supplies.

🖥️

FPGA Core and I/O Power

The TPS74801DRCR's monotonic, programmable soft-start and power-good output make it well suited for FPGA core rails such as 1.0 V or 1.2 V at up to 1.5 A. Placed after a 5 V bias rail, the 60 mV typical dropout at full load minimizes power loss, while the PG signal can gate downstream rails or enable the next sequenced regulator, satisfying FPGA power-up requirements without external supervisor ICs.

🏭

DSP and Processor Power Supplies

The TPS74801DRCR powers DSP and MCU cores from low-voltage rails thanks to its 0.8 V minimum VIN. The programmable soft-start limits capacitive inrush current on the input source, and overcurrent plus thermal protection protect against faults. In TI E2E designs it is used with 5 V bias to regulate low core voltages; the power-good flag simplifies multi-rail sequencing in processor-centric boards.

⚡

Low-VIN Point-of-Load Regulation

With VIN as low as 0.8 V, the TPS74801DRCR regulates directly from 1.8 V or 2.5 V system rails where most LDOs cannot operate. The separate VBIAS (2.7 V to 5.5 V) drives the PMOS pass element, delivering 1.5 A with only 60 mV typical dropout. This enables high-efficiency post-regulation after switching converters with minimal headroom loss in distributed power architectures.

🔧

ASIC and Noise-Sensitive Digital Load Power

The TPS74801DRCR provides controlled, monotonic startup specifically designed for powering ASICs and processors safely. The SS pin capacitor sets the ramp rate to match ASIC inrush specifications, while the adjustable 0.8 V to 3.6 V range covers modern process-node core voltages. Linear regulation adds no switching ripple, keeping rail noise low for noise-sensitive high-speed digital and mixed-signal loads.

🧩

Multi-Rail Power Sequencing Systems

The active-high EN input and open-drain power-good output of the TPS74801DRCR allow cascade sequencing: one regulator's PG signal enables the next rail. This is essential for processors and FPGAs that mandate specific rail order. The 10-VSON (3x3 mm) package keeps the solution compact, and soft-start monotonicity guarantees voltage ramps never dip during sequencing-dependent startup.

🔧

Industrial and Test Equipment Supplies

In industrial and bench-instrument designs, the TPS74801DRCR supplies clean 1.5 A rails to analog front ends and logic. Overcurrent and thermal shutdown provide fault robustness in 24 V-instrument environments after an intermediate buck stage. Its wide 0.8 V to 5.5 V input accommodates varied intermediate buses, and the compact DRC package fits dense PCB instrumentation layouts.

推荐产品汇总

What is the input voltage range of TPS74801DRCR?
The TPS74801DRCR operates from an ultra-low VIN range of 0.8 V to 5.5 V, with a separate VBIAS supply of 2.7 V to 5.5 V. According to TI datasheet (TPS74801, SBVS070), this low-VIN capability allows direct regulation from 1.8 V or 2.5 V rails where conventional LDOs cannot operate.
What is the maximum output current of TPS74801DRCR?
The TPS74801DRCR delivers up to 1.5 A of continuous output current. Per the TI datasheet, its dropout voltage is only 60 mV typical at the full 1.5 A load when VBIAS = 5 V, thanks to the PMOS pass element driven from the separate bias rail.
What is the output voltage range of TPS74801DRCR?
The TPS74801DRCR is adjustable from 0.8 V to 3.6 V using an external resistor divider on the FB pin. According to TI datasheet SBVS070, the internal reference is 0.6 V, and VOUT = 0.6 V x (1 + R1/R2) sets the output within this range.
What is the price of TPS74801DRCR?
As of 2026-08-29, the TPS74801DRCR is priced around 2.15 USD at single-unit quantity, dropping to roughly 1.18 USD at 1000 pieces across distributors such as DigiKey and Mouser. Pricing varies by distributor and volume; check Octopart for real-time quotes from the 4 distributors listing this part.
Where to buy TPS74801DRCR online?
The TPS74801DRCR can be purchased from DigiKey, Mouser, and other authorized TI distributors. As of 2026-08-29, stock is widely available (icDirectory reported in stock in May 2025). DigiKey lists it as 'ships today', making it a well-supplied active part.
What is the best drop-in replacement for TPS74801DRCR?
The TPS74801TDRCRQ1 is the closest drop-in option: it is the same TPS74801 family die in the same 10-VSON (DRC) package with AEC-Q100 automotive qualification. Note that according to TI E2E engineers, the TPS74801DRCR has an unusual pinout with no true pin-to-pin cross-brand matches, so board-level alternatives require a layout change.
TPS74801DRCR vs TPS7A8300 - which is better for FPGA power?
The TPS74801DRCR is better when your input rail is below 2.7 V, since it supports VIN down to 0.8 V; the TPS7A8300 typically needs a higher input. The TPS7A8300 offers more output-current headroom and higher flexibility, but per TI E2E it is not pin-compatible, so choosing it requires a board spin.
What is the difference between TPS74801DRCR and TPS74801TDRCRQ1?
The TPS74801TDRCRQ1 is the automotive-grade variant of the TPS74801 family in the same 10-VSON (DRC) package. Both provide 1.5 A, adjustable 0.8 V to 3.6 V output, power good, enable, and programmable soft-start; the Q1 version adds AEC-Q100 qualification for automotive temperature and reliability requirements.
When should I choose TPS74801DRCR over other LDOs?
Choose the TPS74801DRCR when your input supply is very low (0.8 V to 2.7 V) yet you need up to 1.5 A at low dropout, or when monotonic programmable soft-start and a power-good flag are required for processor/FPGA power sequencing. If your input is 5 V or higher, standard LDOs without a bias rail may be simpler and cheaper.
Is TPS74801DRCR pin-compatible with other regulators?
No. According to TI E2E support engineers, the TPS74801DRCR has an unusual pinout and there are no pin-to-pin matches, even within TI. Functionally similar parts such as TPS7A8300ARGRR, TPS7A9201DSKR, and TPS7A5201RPSR exist but require different footprints. Only the TPS74801TDRCRQ1 shares the same die and package.
Where can I download the TPS74801DRCR datasheet PDF?
The official TPS74801 datasheet PDF is available on TI.com at https://www.ti.com/lit/ds/symlink/tps74801.pdf. The current datasheet (TPS748, 1.5-A Low-Dropout Linear Regulator With Programmable Soft-Start) is approximately 47 pages and covers specifications, application circuits, and layout guidance.
How does the soft-start pin work on TPS74801DRCR?
The SS pin sets a programmable, monotonic output-voltage ramp via an external capacitor, controlling inrush current during startup. Per the TI datasheet, this prevents output overshoot with large capacitive loads and is designed for safely powering processors, FPGAs, and ASICs that require controlled voltage ramp rates.
Is TPS74801DRCR RoHS compliant?
Yes, the TPS74801DRCR is RoHS compliant and lead-free, as listed on TI product pages and distributor records. The 10-VSON (DRC) package is a surface-mount, halogen-aware TI green package; confirm the exact environmental data on the TI quality page for your specific orderable suffix.
What are the key specifications of TPS74801DRCR that engineers should know?
Key specifications: 1.5 A maximum output current; VIN from 0.8 V to 5.5 V with VBIAS from 2.7 V to 5.5 V; adjustable VOUT from 0.8 V to 3.6 V; 60 mV typical dropout at 1.5 A (VBIAS = 5 V); power-good output; active-high enable; programmable monotonic soft-start; overcurrent and thermal protection; 10-VSON (3x3 mm) package. Source: TI datasheet SBVS070.

工程参考数据: TPS74801DRCR ——对比、设计指导和合规信息。

选型指南

Choose the TPS74801DRCR when you must regulate from a very low input rail (0.8 V to 2.7 V) at up to 1.5 A, or when monotonic programmable soft-start and a power-good flag are required for processor, FPGA, or ASIC power sequencing. Choose TPS74801TDRCRQ1 instead for automotive programs needing AEC-Q100 qualification - it is the same die and package, so no PCB change is needed. If your input is a healthy 5 V rail and you do not need the bias-rail architecture, consider TPS7A8300ARGRR for its 2 A capability, but budget a board spin since the pinouts differ. Per TI E2E, no cross-brand or even same-brand pin-to-pin alternates exist for the TPS74801 footprint, so supply-chain resilience should rely on the Q1 and DRCT packaging variants rather than second sources.

与替代料对比

参数 本产品 TPS74801TDRCRQ1 TPS74801DRCT TPS7A8300ARGRR TPS7A9201DSKR
Package 10-VSON (3x3 mm) DRC 10-VSON (3x3 mm) DRC - same 10-VSON (3x3 mm) DRC - same VQFN-20 (RGW) - different WSON-8 (DSK) - different
Brand Texas Instruments Texas Instruments Texas Instruments Texas Instruments Texas Instruments
Maximum Output Current 1.5 A 1.5 A 1.5 A 2 A 2 A

关键差异点

  • Ultra-low 0.8 V minimum input voltage (对比 TPS7A8300ARGRR)
  • Monotonic programmable soft-start for ASIC/FPGA safety (对比 TPS7A9201DSKR)
  • Automotive same-die upgrade path (对比 TPS74801TDRCRQ1)

设计说明

Always supply VBIAS with 2.7 V to 5.5 V even when VIN is very low; the bias rail drives the PMOS pass element gate and enables the 60 mV typical dropout at 1.5 A. A common pitfall is tying VBIAS to VIN when VIN is 1.8 V - the regulator will not meet dropout or current specs. Derive VBIAS from a 5 V rail or the upstream buck output when available.

Place a 10 uF ceramic input capacitor and at least 10 uF effective output ceramic capacitor within 2-3 mm of the IN and OUT pins. The VSON-10 exposed thermal pad must be soldered to a grounded copper pour with multiple vias - it is the primary thermal and ground path. Refer to the layout section of TI datasheet TPS74801 (SBVS070) for the recommended footprint.

Size the SS capacitor for your load capacitance: large FPGA/ASIC decoupling banks require a slower ramp to avoid inrush tripping overcurrent protection. Use 1% tolerance resistors on the FB divider to maintain output accuracy. Note the unusual pinout - TI E2E confirms no pin-to-pin alternates exist, so never assume footprint compatibility with other TI LDOs without checking the datasheet.

合规信息

RoHS
Compliant
REACH
Unknown
AEC-Q100
Not Applicable
无铅
Yes
无卤
Unknown
冲突矿物
Unknown

RoHS compliant and lead-free per TI product page and distributor listings. AEC-Q100 applies to the TPS74801TDRCRQ1 variant, not the standard TPS74801DRCR.

数据核验日期: 2026-08-29 ——数据由 XAIPART 元器件工程团队核验和整理

相关搜索

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相关元器件 & 术语

Texas Instruments TPS74801DRCR TPS74801TDRCRQ1 TPS7A8300ARGRR TPS7A9201DSKR LDO low-dropout linear regulator voltage regulator power management IC 10-VSON VSON-10 3x3 mm soft-start power good output VBIAS dropout voltage AEC-Q100 RoHS FPGA power supply DSP power rail power sequencing PSRR
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