TSA7887BRZ - 12-bit 125kSPS 2-Ch SAR ADC | Silicon Labs
料号： TSA7887BRZ ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $2.95 | $2.95 |
| 10 | $2.65 | $26.50 |
| 100 | $2.35 | $235.00 |
| 500 | $2.05 | $1,025.00 |
| 1,000 | $1.85 | $1,850.00 |
TSA7887BRZ 概述
A SAR ADC is a successive-approximation analog-to-digital converter, a precision converter architecture that resolves each conversion one bit per clock cycle using a sample-and-hold front-end, an internal DAC, and a comparator. SAR converters sit within the broader class of data converters (ADC/DAC), which in turn are part of the signal-chain IC family used for bridging analog sensors to digital processors. Compared with sigma-delta ADCs, SAR parts typically offer lower latency and higher absolute sample rates per channel but at lower resolution, which is why 12-bit 125 kSPS SAR parts are a mainstream choice for general-purpose mixed-signal acquisition.
Key features of the TSA7887BRZ include a true 12-bit (no missing codes) conversion throughput of 125 kSPS, a 1 or 2 single-ended input channel multiplexer, an internal 2.5 V reference with low drift, a wide 2.7 V to 5.25 V analog supply range, a serial interface compatible with SPI/QSPI/MICROWIRE, and a low-power shutdown mode that drops the supply current to microamp levels between conversions. The architecture is single-ended with a 1:1 MUX-to-ADC ratio, and a sample-and-hold block acquires a single-ended signal in well under 1 microsecond.
Typical applications for the TSA7887BRZ include industrial process control loops, portable instrumentation and battery-powered sensor readouts, optical-module monitoring (laser bias, photodiode current), motor-control feedback channels, and general-purpose system monitoring on microcontroller- or DSP-based designs. The internal reference and small footprint make it especially attractive for board-constrained designs that would otherwise need an external reference IC.
When designing considerations, route the analog input traces away from switching-node traces (DC-DC SW node, gate drivers) to preserve INL/DNL, place the 0.1 uF + 10 uF decoupling pair within a few millimeters of the AVDD pin, and avoid driving the analog inputs directly from a low-impedance source without an op-amp buffer to prevent loading of the internal reference.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that are not found on the manufacturer product page, giving engineers a single decision-ready reference.
直接替换替代料： TSA7887BRZ ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： TSA7887BRZ （相同外形与封装尺寸） ——差异在于 Data Interface, Package, Number of Channels, Input Type, Operating Temperature.
快速对比工具——选择替代料号进行并排对比：
TSA7887BRZ-REEL
✅ 直接替换✓ 有现货
$2.4 / 个
查看数据手册 →TSA7887ARMZ-REEL
✅ 直接替换✓ 有现货
$2.55 / 个
查看数据手册 →AD7887BRZ
✅ 直接替换📋 参考替代料（不在目录中）
AD7887BRZ-REEL
✅ 直接替换📋 参考替代料（不在目录中）
TLV2545IDGKR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$2.33 / 个
查看数据手册 →TSA7887BRZ 最大额定值与电气特性
| 分辨率 | 12 bit |
| Number of Channels | 1 or 2 input, single-ended |
| 采样率 | 125 kSPS |
| Architecture | SAR (Successive Approximation Register) |
| Input Type | Single-Ended |
| Data Interface | SPI / QSPI / MICROWIRE-compatible serial |
| Configuration | MUX-S/H-ADC (1:1 ratio) |
| Number of ADC Converters | 1 |
| Reference Type | Internal 2.5 V |
| Analog Supply Voltage | 2.7 V to 5.25 V |
| Digital I/O Supply | Same as AVDD (single-supply operation) |
| 封装 | 8-SOIC (SOIC-8) |
| 安装类型 | Surface Mount |
| RoHS 状态 | Compliant |
TSA7887BRZ 引脚配置
| 引脚 1 | AIN1 / CS1 — Analog input channel 1 (single-ended) |
| 引脚 2 | AVDD — Analog supply voltage, 2.7 V to 5.25 V |
| 引脚 3 | GND — Ground (analog and digital common) |
| 引脚 4 | REF — Internal 2.5 V reference output / decoupling node |
| 引脚 5 | AIN2 / CS2 — Analog input channel 2 (single-ended) |
| 引脚 6 | CS — Chip-select input (active low) for serial interface |
| 引脚 7 | SCLK — Serial clock input (SPI/QSPI/MICROWIRE-compatible) |
| 引脚 8 | DOUT — Serial data output (conversion result) |
典型应用
TSA7887BRZ 适用于 6 应用s: Industrial Process Control Loops, Portable Instrumentation and Battery-Powered Sensor Readouts, Optical Module Monitoring (Laser Bias, Photodiode Current), Motor-Control Feedback Channels, General Microcontroller / DSP System Monitoring, IoT Edge-Node Sensor Acquisition.
Industrial Process Control Loops
The TSA7887BRZ's 12-bit resolution and 125 kSPS SAR throughput provide enough margin to digitize 4-20 mA loop-derived or thermocouple-amplified signals at loop scan rates below 1 kHz. Its 2.7 V to 5.25 V single-supply operation lets it share a 24 V-to-5 V post-regulated rail with the host MCU. The integrated 2.5 V reference removes a precision component from the BOM, and the 8-SOIC footprint keeps the analog front-end footprint under 25 mm^2 on the PLC analog-input card. The shutdown pin enables duty-cycled acquisition to limit power dissipation in densely-populated DIN-rail modules.
推荐
Portable Instrumentation and Battery-Powered Sensor Readouts
The TSA7887BRZ is well matched to portable, battery-powered sensor readouts because it runs from 2.7 V to 5.25 V single supply and offers a microamp-level shutdown mode that drops supply current between conversions. Its 125 kSPS sample rate captures pulsed sensor events (e.g., peak-and-hold detector outputs) without aliasing, while the internal 2.5 V reference eliminates an extra reference IC and the quiescent current it would draw. The 8-SOIC footprint suits handheld multimeter and field-instrument mainboards where every square millimeter counts.
推荐
Optical Module Monitoring (Laser Bias, Photodiode Current)
The TSA7887BRZ's 1- or 2-channel single-ended input multiplexer is well suited to SFP/QSFP optical-module monitoring, where a single ADC digitizes both laser-bias voltage and photodiode current. The 125 kSPS throughput comfortably exceeds the 10 kHz typical APC loop bandwidth, while the integrated 2.5 V reference keeps measurement gain error low without an external reference. The 8-SOIC package fits beside the laser-driver IC inside the optical subassembly PCB area, and the SPI-compatible serial interface drops cleanly into an MCU supervisory channel.
推荐
Motor-Control Feedback Channels
The TSA7887BRZ can digitize shunt-resistor-derived current feedback in BLDC or stepper motor drives, where 12-bit resolution and 125 kSPS are sufficient for 10-20 kHz PWM-aligned current loops. Its 2.7 V to 5.25 V supply range allows direct connection to the 3.3 V or 5 V rails typically present on the motor MCU, and the shutdown pin enables event-driven sampling synchronized to the PWM reload. The 8-SOIC package sits on the power stage board alongside the gate driver, sampling current synchronously with the PWM edge.
推荐
General Microcontroller / DSP System Monitoring
On microcontroller- or DSP-based designs, the TSA7887BRZ provides a compact way to add system-health monitoring (supply rail, temperature, current sense) without expanding the BOM. The 1- or 2-channel input multiplexer feeds one SAR ADC, so two rail monitors can share one part. The serial SPI/QSPI/MICROWIRE-compatible interface drops onto any MCU or DSP serial port without glue logic. With an internal 2.5 V reference and an 8-SOIC footprint, the TSA7887BRZ is a practical 'just-add-two-rails' building block for supervisory boards.
推荐
IoT Edge-Node Sensor Acquisition
The TSA7887BRZ suits IoT edge nodes that need 12-bit absolute accuracy at modest sampling rates (under 1 kSPS average, 125 kSPS burst) for analog sensors such as load cells, thermistor bridges, or gas-sensor front-ends. Its single 2.7 V to 5.25 V supply range aligns with Li-ion and 3.3 V regulator rails, and its shutdown mode enables < 1 uA standby between bursts for multi-year battery life. The 8-SOIC footprint suits compact edge-node PCBs alongside the radio module, and the internal 2.5 V reference simplifies factory calibration.
推荐
推荐产品汇总
工程参考数据： TSA7887BRZ ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | TSA7887BRZ-REEL | TSA7887ARMZ-REEL | AD7887BRZ | AD7887BRZ-REEL | TLV2545IDGKR |
|---|---|---|---|---|---|---|
| Package | 8-SOIC | 8-SOIC - same | 8-SOIC - same | 8-SOIC - same | 8-SOIC - same | 8-SOIC (MSOP option) - same family |
| Brand | Silicon Labs | Silicon Labs | Silicon Labs | Analog Devices | Analog Devices | Texas Instruments |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Sampling Rate | 125 kSPS | 125 kSPS | 125 kSPS | 125 kSPS | 125 kSPS | 200 kSPS |
| Number of Channels | 1 or 2 single-ended | 1 or 2 single-ended | 1 or 2 single-ended | 1 or 2 single-ended | 1 or 2 single-ended | 1 single-ended |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR |
| Reference Type | Internal 2.5 V | Internal 2.5 V | Internal 2.5 V | Internal 2.5 V | Internal 2.5 V | External (datasheet family option) |
| Analog Supply Range | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.25 V | 2.7 V to 5.5 V |
| Data Interface | SPI/QSPI/MICROWIRE serial | SPI/QSPI/MICROWIRE serial | SPI/QSPI/MICROWIRE serial | SPI/QSPI/MICROWIRE serial | SPI/QSPI/MICROWIRE serial | SPI/QSPI/MICROWIRE serial |
关键差异点
- True cross-brand second-source (Silicon Labs vs Analog Devices) with identical pinout and electrical behavior （对比 AD7887BRZ)
- Integrated 2.5 V internal reference eliminates an external reference IC from the BOM （对比 External-reference SAR ADCs in 8-SOIC)
- 1- or 2-channel single-ended input multiplexer in a single 8-SOIC pinout （对比 Single-channel 12-bit SAR ADCs in 8-SOIC)
设计说明
Place a 0.1 uF X7R ceramic bypass capacitor within 3 mm of the AVDD pin (pin 2) and a 10 uF X5R bulk capacitor at the same node to suppress digital-current transients from corrupting the SAR conversion. The internal 2.5 V reference draws transient current during conversion; insufficient bypassing will increase INL and DNL. Place the reference decoupling (typically 0.1 uF + 10 uF) directly at the REF pin (pin 4).
Route the analog input traces (AIN1/AIN2) away from the serial interface traces (SCLK, DOUT, CS) and from any switching-node traces (DC-DC SW nodes, gate drivers, motor-phase traces). Use a ground guard ring around the analog input pins tied to the ADC GND pin (pin 3) to reduce digital-noise coupling into the sample-and-hold front-end. Keep the input traces short and matched so source-impedance asymmetry does not bias the sample-and-hold acquisition.
Driving the analog input directly from a low-impedance source without an op-amp buffer can disturb the internal 2.5 V reference during the sample-and-hold acquisition phase, adding gain error. Add a rail-to-rail input op-amp buffer (e.g., OPAx237 family) in front of AIN1/AIN2 if the source impedance is below 1 kohm. Do not exceed the absolute analog input voltage of AVDD + 0.3 V or go below GND - 0.3 V; overdrive will degrade linearity and can latch the input ESD structure.
合规信息
RoHS compliance and lead-free status confirmed per Silicon Labs product page. AEC-Q100 automotive qualification status not published in the verified web data; for automotive-grade 12-bit 125 kSPS SAR ADCs in 8-SOIC, request the AEC-Q100 qualified variant from Silicon Labs. Halogen-free status not explicitly stated in the verified web data.
