EP1M120F484C8ES vs EP1M120F484I6M Comparison
Detailed side-by-side comparison of EP1M120F484C8ES by Intel and EP1M120F484I6M by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1M120F484C8ES | EP1M120F484I6M |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $119.40 | $325.00 |
| Family | ACEX 1M | Mercury (EP1M) |
| Manufacturer | Intel (formerly Altera) | β |
| Logic Elements / Gates | 120,000 (120K gates) | β |
| Embedded Logic Cells (EABs) | 4,800 | β |
| User I/O Pins | 303 | β |
| Package | 484-ball FineLine BGA | β |
| Speed Grade | C8 (-8 speed bin) | -6 (slowest Mercury timing bin) |
| Sample Grade | ES (Engineering Sample) | β |
| Process Technology | 0.18 Β΅m CMOS, SRAM-based | β |
| Embedded RAM | ~104 Kbits across 12 RAM blocks | β |
| PLLs | 4 enhanced PLLs | β |
| I/O Standards | LVTTL, LVCMOS, True-LVDS, PCI | LVTTL, LVCMOS, SSTL, HSTL, LVDS |
| Operating Voltage (Core) | [DATA_NEEDED: core VCC range] | β |
| MultiVolt I/O Support | 1.5 V / 2.5 V / 3.3 V / 5.0 V tolerant | β |
| Configuration Method | SRAM bitstream, JTAG/serial | β |
| Operating Temperature | [DATA_NEEDED: industrial/commercial grade temp range] | β |
| RoHS Status | [DATA_NEEDED] | Compliant (M revision) |
| Mounting Type | Surface Mount (BGA) | β |
| Logic Elements | β | 120,000 |
| System Gates | β | 480,000 (typical) |
| LABs / CLBs | β | 303 |
| Flip-Flops | β | 49,152 |
| Embedded Memory (Bits) | β | 4,800 Kb (480 Kbits) |
| Package Type | β | 484-Ball FCBGA |
| Package Code | β | BGA, 484 balls, Fine-pitch |
| Package Shape | β | Square |
| Terminal Form | β | Ball |
| Temperature Grade | β | Industrial |
| Supply Voltage | β | 1.5 V core / 3.3 V aux (per Mercury datasheet) |
| Clock Management | β | PLLs (per Mercury family) |
| Boundary-Scan | β | IEEE 1149.1 / JTAG |