EP1M120F484C8ES vs EP1M120F484I6M 对比
详细并排对比 EP1M120F484C8ES 出自 Intel 和 EP1M120F484I6M 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1M120F484C8ES | EP1M120F484I6M |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $119.40 | $325.00 |
| Family | ACEX 1M | Mercury (EP1M) |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Gates | 120,000 (120K gates) | — |
| Embedded Logic Cells (EABs) | 4,800 | — |
| User I/O Pins | 303 | — |
| 封装 | 484-ball FineLine BGA | — |
| Speed Grade | C8 (-8 speed bin) | -6 (slowest Mercury timing bin) |
| Sample Grade | ES (Engineering Sample) | — |
| Process Technology | 0.18 µm CMOS, SRAM-based | — |
| Embedded RAM | ~104 Kbits across 12 RAM blocks | — |
| PLLs | 4 enhanced PLLs | — |
| I/O Standards | LVTTL, LVCMOS, True-LVDS, PCI | LVTTL, LVCMOS, SSTL, HSTL, LVDS |
| Operating Voltage (Core) | [DATA_NEEDED: core VCC range] | — |
| MultiVolt I/O Support | 1.5 V / 2.5 V / 3.3 V / 5.0 V tolerant | — |
| Configuration Method | SRAM bitstream, JTAG/serial | — |
| 工作温度 | [DATA_NEEDED: industrial/commercial grade temp range] | — |
| RoHS 状态 | [DATA_NEEDED] | Compliant (M revision) |
| 安装类型 | Surface Mount (BGA) | — |
| Logic Elements | — | 120,000 |
| System Gates | — | 480,000 (typical) |
| LABs / CLBs | — | 303 |
| Flip-Flops | — | 49,152 |
| Embedded Memory (Bits) | — | 4,800 Kb (480 Kbits) |
| Package Type | — | 484-Ball FCBGA |
| Package Code | — | BGA, 484 balls, Fine-pitch |
| Package Shape | — | Square |
| Terminal Form | — | Ball |
| Temperature Grade | — | Industrial |
| 电源电压 | — | 1.5 V core / 3.3 V aux (per Mercury datasheet) |
| Clock Management | — | PLLs (per Mercury family) |
| Boundary-Scan | — | IEEE 1149.1 / JTAG |