EP1S20F672C7 vs EP1S20F672C7N Comparison

Detailed side-by-side comparison of EP1S20F672C7 by Intel and EP1S20F672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP1S20F672C7 EP1S20F672C7 - Stratix FPGA 18,460 LEs 672-BGA | Intel

EP1S20F672C7 - Stratix FPGA 18,460 LEs 672-BGA | Intel

EP1S20F672C7 ⚠ Last Time Buy

Specification Comparison

Parameter EP1S20F672C7 EP1S20F672C7N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $109.20
Series Stratix Stratix (first generation)
Family Altera Stratix FPGA Stratix
Logic Elements (LEs) 18,460 18,460
Embedded Memory Bits 1,669,248 β€”
User I/O Pins 426 β€”
DSP Blocks [DATA_NEEDED: DSP block count] 56 (dedicated 18x18 multipliers)
Package 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) 672-FBGA (FineLine BGA)
Logic Family CMOS, SRAM-based β€”
Core Supply Voltage 1.5 V β€”
Operating Temperature 0C to 85C (commercial) 0Β°C to +85Β°C (commercial)
Speed Grade C7 C7 (-7)
Configuration Modes JTAG, Passive Serial, Fast Passive Parallel, Active Serial PS, PPS, FPP, JTAG
Mounting Type Surface Mount Surface Mount
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED: moisture sensitivity level]
RoHS Status unknown β€”
Clock PLLs Up to 10 β€”
Logic Cells β€” 18,460
Configurable Logic Blocks (CLBs) β€” 2,132
Embedded Memory (TriMatrix) β€” 1,669,248 bits (426 Kbit total)
Maximum User I/O β€” 586
I/O Banks β€” [DATA_NEEDED: I/O bank count]
PLLs β€” Up to 12
Maximum Operating Frequency β€” 420.17 MHz
Core Voltage β€” 1.5 V
Process Technology β€” 130 nm CMOS
Package Body Size β€” 35 mm x 35 mm
Ball Pitch β€” 1.27 mm
Lead-Free / RoHS β€” Yes (lead-free finish, RoHS compliant)

Datasheets & Resources

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