EP20K400CF672C7ES vs EP20K400CF672C8AA Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K400CF672C7ES disebabkan oleh Altera dan EP20K400CF672C8AA disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K400CF672C7ES EP20K400CF672C8AA
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20K
Series EP20K400 —
Device Type Loadable PLD / FPGA —
Logic Elements (Cells) 16,640 —
System Gates 400,000 —
Embedded Memory (Bits) 212,992 —
Total RAM Bits 212,992 —
Maximum User I/O 488 —
I/O Lines 484 —
Input Lines 488 —
Number of PLLs 4 —
Maximum Internal Clock Frequency 375.94 MHz —
Propagation Delay 1.4 ns [DATA_NEEDED: typical propagation delay]
Process Technology 0.18 um CMOS —
Core Voltage 1.8 V —
MultiVolt I/O 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Speed Grade C7 (commercial, -7) —
Suhu Operasi 0C to +85C (commercial) 0 C to 85 C (Commercial)
Package Type 672-ball FineLine BGA 672-ball Fine-Pitch BGA (FBGA)
Package Code FC-FBGA-B672 —
Ball Pitch 1.000 mm —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Number of Logic Elements/Cells — 16640
Number of Logic Units (LEs) — [DATA_NEEDED: number of LUs]
Embedded System Blocks (ESBs) — 212
On-chip RAM Bits — [DATA_NEEDED: total embedded memory bits]
Number of User I/O Pins — 488
Number of Pins/Balls — 672
Supply Voltage (Core) — 2.5 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O)
Packaging — Tray
Tingkat sensitiviti Air Nama (MSL) — 3 (168 Hours)
Configuration Interface — JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous

Laporan Datasheet & Sumber

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