EP20K400FC672-3X vs EP20K400FC672-3 Comparison

Detailed side-by-side comparison of EP20K400FC672-3X by Altera and EP20K400FC672-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K400FC672-3X EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera

EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera

EP20K400FC672-3X ⚠ Last Time Buy

Specification Comparison

Parameter EP20K400FC672-3X EP20K400FC672-3
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $152.40 $138.00
Logic Family APEX 20K CMOS, SRAM-based
Device Sub-family EP20K400 β€”
Technology CMOS 0.22 Β΅m β€”
Number of Gates 400,000 (typical) β€”
Logic Cells 16,640 β€”
Macros / Macrocells 1664 β€”
User I/Os 502 β€”
Dedicated I/O Lines 496 β€”
Core Supply Voltage 2.5 V 2.5 V
Maximum Clock Frequency 181.82 MHz β€”
Typical Propagation Delay 2.07 ns β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) 0 Β°C to 85 Β°C
Speed Grade -3X -3 (commercial fastest)
Package 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) 672-pin FC-FBGA
Architecture MultiCore (LUT + embedded CAM/RAM) MultiCore (LUT + Embedded System Blocks)
Programming Interface JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster β€”
Mounting Type Surface Mount (BGA) Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Family β€” APEX 20K
Device Logic Elements β€” 16,640 cells
Typical Gate Count β€” 400,000 system gates
Maximum User I/Os β€” 502
Propagation Delay β€” 2.5 ns
Internal Performance β€” 167 MHz
Process Technology β€” 0.22 Β΅m CMOS
Package Code β€” BGA
Number of Terminals β€” 672
Terminal Form β€” Ball (BGA)
Programming Method β€” SRAM, JTAG (ByteBlaster)
Lifecycle Status β€” Obsolete / Legacy

Datasheets & Resources

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