EP20K400FI672-3N vs EP20K400FI672-3 Comparison
Detailed side-by-side comparison of EP20K400FI672-3N by Altera and EP20K400FI672-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FI672-3N | EP20K400FI672-3 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Unknown | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $195.00 |
| Device Type | CMOS loadable programmable logic device | β |
| Product Family | APEX 20K | β |
| Series | EP20K400 | EP20K400 |
| Propagation Delay | 3.6 ns | 3.6 ns |
| Maximum Clock Frequency | 833 MHz | 833 MHz |
| User I/O Count | 502 | β |
| Nominal Supply Voltage | 2.5 V | β |
| Supply Voltage Range | 2.375 V to 2.625 V | 2.375 V to 2.625 V |
| Process Technology | CMOS | CMOS |
| Package | S-PBGA-B672 | β |
| Terminal Count | 672 terminals | 672 |
| Terminal Pitch | 1.000 mm | 1.000 mm |
| Mounting Type | Surface mount | Surface Mount |
| Logic Capacity | [DATA_NEEDED: logic capacity] | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Configuration Method | [DATA_NEEDED: configuration method] | β |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | β |
| RoHS Status | unknown | β |
| REACH Status | unknown | β |
| AEC-Q100 Qualification | unknown | β |
| Family | β | APEX 20K |
| Logic Elements | β | 16640 |
| Total Gates | β | up to 400000 |
| Embedded RAM | β | 212992 bits |
| Maximum User I/O | β | 502 |
| Dedicated Inputs | β | 6 |
| Supply Voltage (Nominal) | β | 2.5 V |
| Package Type | β | PBGA (Plastic BGA) |
| Package Code | β | S-PBGA-B672 |
| Package Shape | β | Square BGA |
| Configuration Interface | β | JTAG (IEEE 1149.1) |
| MSL Level | β | 3 |
| Peak Reflow Temperature | β | 220 C |