EP2A15B724C vs EP2A15B724C7 Perbandingan

Perbandingan bersamaan detil EP2A15B724C dari Altera dan EP2A15B724C7 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP2A15B724C EP2A15B724C7
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX II APEX II
Logic Elements (LEs) 16,640 —
Maximum User I/O Pins 492 —
Embedded RAM 425,984 bits —
Paket 724-Ball FCBGA (FineLine BGA) 724-BBGA, FCBGA (35 mm x 35 mm)
Process Technology 0.18 micron CMOS 0.15 um all-layer copper
Maximum System Gates Up to 1.5M gates (family-level) —
Embedded System Blocks (ESBs) Configurable as dual-port RAM / ROM / FIFO —
Interconnect MultiTrack, deterministic —
I/O Standards LVTTL, LVCMOS, LVDS, PCI, GTL+ (family-level) —
PLLs Yes (family-level, up to 4 per device) —
Suhu Kerja [DATA_NEEDED: operating temperature grade] 0 C to 85 C (TJ)
Tipe Mounting Surface Mount (BGA) Surface Mount (BGA)
Level MSL [DATA_NEEDED: MSL rating] —
Status RoHS [DATA_NEEDED: RoHS compliance] unknown
Speed Grade C (per suffix; specific speed bin [DATA_NEEDED]) C7 (per part suffix)
JTAG / Configuration IEEE 1149.1 JTAG; passive serial / PS configuration supported (family-level) —
Manufacturer — Altera (acquired by Intel)
System Gates — 600,000
Logic Elements / Cells — 16,640
Total RAM Bits — 425,984
Number of I/O — 492
Core Voltage — 1.425 V to 1.575 V
Maximum Internal Frequency — 500 MHz
LVDS Support — True-LVDS up to 1 Gbps
Interface Standards — True-LVDS, LVPECL, PCML, HyperTransport
Configuration Modes — Passive Serial, Passive Parallel, JTAG

Spek dan Sumber

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