EP2A25F672I7N vs EP2A25F672I-9 Comparison
Detailed side-by-side comparison of EP2A25F672I7N by Intel and EP2A25F672I-9 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A25F672I7N | EP2A25F672I-9 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $175.00 | $195.00 |
| Family | APEX II | APEX II |
| Logic Elements (Cells) | 24,320 | β |
| Typical Gate Count | 900,000 | β |
| Maximum Internal Frequency | 500 MHz | β |
| Process Technology | 0.15 Β΅m CMOS | 0.18 Β΅m CMOS |
| Core Supply Voltage | 1.5 V | β |
| Package | 672-ball FC-FBGA | 672-pin FCBGA (FineLine BGA) |
| Pin/Ball Count | 672 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial (I) | Industrial (-40 Β°C to +100 Β°C junction) |
| Speed Grade | 7 | -9 |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel | β |
| Design Software | Quartus II | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lifecycle Status | Not Recommended for New Designs (NRND) | β |
| Logic Elements (typical) | β | 25,000 |
| Maximum System Gates | β | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESB) Memory | β | 1,125 Kbits |
| Maximum User I/O Pins | β | [DATA_NEEDED: maximum user I/O pins] |
| Number of PLLs | β | 4 |
| Core Voltage | β | 1.5 V / 1.8 V (speed-grade dependent) |
| Moisture Sensitivity Level (MSL) | β | 3 (per Vyrian listing) |
| Peak Reflow Temperature | β | 220 Β°C (per Vyrian listing) |
| Configuration Method | β | JTAG / serial configuration EPROM |
| Supported I/O Standards | β | LVTTL, LVCMOS, LVDS, PCI |
| Legacy Status | β | Obsolete - consult Altera / Intel FPGA archive for documentation |