EP2AGX190FF35I5 vs EP2AGX190FF35I3G Comparison
Detailed side-by-side comparison of EP2AGX190FF35I5 by Intel and EP2AGX190FF35I3G by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G β Last Time BuySpecification Comparison
| Parameter | EP2AGX190FF35I5 | EP2AGX190FF35I3G |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,700.00 | $1,840.00 |
| Family | Arria II GX | Arria II GX |
| Logic Elements (LE) | 181165 | 181,165 |
| Embedded Memory Bits | 10177536 | β |
| User I/O Count | 612 | β |
| Process Technology | 40 nm | β |
| Core Voltage | 0.9 V | 0.9 V |
| Package | 1152-ball FC-FBGA (Flip-Chip BGA) | 1152-ball FC-FBGA (FF35), 35 mm body |
| Speed Grade | 5 (slowest in family, lower power) | 3 |
| Operating Temperature Grade | Industrial (-40 C to +100 C ambient) | β |
| Maximum User Frequency | 500 MHz | β |
| DSP Blocks | [DATA_NEEDED: DSP block count and 18x18 multiplier count] | β |
| Transceiver Count | [DATA_NEEDED: number of multi-gigabit transceivers] | β |
| Transceiver Data Rate | [DATA_NEEDED: max Gbps per channel] | β |
| PCIe Hard IP | PCIe Gen1/Gen2 hard IP blocks (per family feature) | β |
| Configuration Memory | SRAM-based, supports EPCS serial Flash loaders | β |
| Mounting Type | Surface Mount (BGA, reflow soldering required) | Surface Mount (flip-chip BGA) |
| RoHS Status | Compliant (per Intel product page) | Compliant (suffix G) |
| Lead-Free | Yes (per Intel product page) | Yes |
| MSL Level | [DATA_NEEDED: Moisture Sensitivity Level] | β |
| Adaptive Logic Modules (ALM) | β | [DATA_NEEDED: ALM count] |
| User I/O Pins | β | 612 |
| Embedded Memory (bits) | β | 10,177,536 |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Transceivers | β | 8 high-speed transceiver channels (multi-gigabit) |
| Embedded Multipliers | β | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | β | [DATA_NEEDED: PLL count] |
| I/O Voltage Standards | β | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | β | 40 nm |
| Operating Temperature | β | -40 Β°C to +100 Β°C (industrial, suffix I) |
| Ball Pitch | β | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Programming Toolchain | β | Quartus II / Quartus Prime |