EP2AGX190FF35I5 vs EP2AGX190FF35I3G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGX190FF35I5 sa pamamagitan ng Intel at EP2AGX190FF35I3G sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2AGX190FF35I5 | EP2AGX190FF35I3G |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Family | Arria II GX | Arria II GX |
| Logic Elements (LE) | 181165 | 181,165 |
| Embedded Memory Bits | 10177536 | — |
| User I/O Count | 612 | — |
| Process Technology | 40 nm | — |
| Core Voltage | 0.9 V | 0.9 V |
| Packhaging | 1152-ball FC-FBGA (Flip-Chip BGA) | 1152-ball FC-FBGA (FF35), 35 mm body |
| Speed Grade | 5 (slowest in family, lower power) | 3 |
| Operating Temperature Grade | Industrial (-40 C to +100 C ambient) | — |
| Maximum User Frequency | 500 MHz | — |
| DSP Blocks | [DATA_NEEDED: DSP block count and 18x18 multiplier count] | — |
| Transceiver Count | [DATA_NEEDED: number of multi-gigabit transceivers] | — |
| Transceiver Data Rate | [DATA_NEEDED: max Gbps per channel] | — |
| PCIe Hard IP | PCIe Gen1/Gen2 hard IP blocks (per family feature) | — |
| Configuration Memory | SRAM-based, supports EPCS serial Flash loaders | — |
| Uri ng Pagpapasok | Surface Mount (BGA, reflow soldering required) | Surface Mount (flip-chip BGA) |
| Tindminan RoHS | Compliant (per Intel product page) | Compliant (suffix G) |
| Lead-Free | Yes (per Intel product page) | Yes |
| Level ng MSL | [DATA_NEEDED: Moisture Sensitivity Level] | — |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| User I/O Pins | — | 612 |
| Embedded Memory (bits) | — | 10,177,536 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Transceivers | — | 8 high-speed transceiver channels (multi-gigabit) |
| Embedded Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| I/O Voltage Standards | — | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | — | 40 nm |
| Temperature na Operasyon | — | -40 °C to +100 °C (industrial, suffix I) |
| Ball Pitch | — | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Programming Toolchain | — | Quartus II / Quartus Prime |