EP610DC15 vs EP610DC35 Comparison
Detailed side-by-side comparison of EP610DC15 by Intel and EP610DC35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DC15 | EP610DC35 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.50 | $19.20 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | β |
| Family | EP610 Classic EPLD | Classic EPLD |
| Macrocells | 16 | β |
| Architecture | PAL-type | β |
| Propagation Delay (tPD) | 15 ns | 35 ns |
| Maximum Clock Frequency (fMAX) | 71.4 MHz | β |
| Pipelined Data Rate | up to 100 MHz | up to 100 MHz |
| Total Inputs | 20 | β |
| I/O Lines | 16 | β |
| Product Terms | 160 | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | β |
| Technology | CMOS | UV-erasable CMOS EPROM |
| Operating Temperature | 0C to +70C | [DATA_NEEDED: operating temperature range] |
| Package | 24-pin CDIP (Ceramic DIP, windowed) | 24-pin CDIP (Ceramic DIP) with quartz erase window |
| Mounting Type | Through-Hole | Through-Hole |
| Reprogrammability | Yes (UV erasable via windowed package) | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| Logic Elements | β | 16 macrocells |
| Usable Gates | β | 300 |
| Maximum Frequency | β | 28.6 MHz |
| Supply Voltage | β | 5 V |
| Pin Count | β | 24 |
| Programming Method | β | Altera legacy programmer (PLDLMax or compatible) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| I/O Pins | β | [DATA_NEEDED: number of user I/O pins] |