EP910DC-30 vs EP910DI-35 Comparison
Detailed side-by-side comparison of EP910DC-30 by Intel and EP910DI-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910DC-30 | EP910DI-35 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.60 | $35.20 |
| Family | Classic EPLD (EP910 series) | Altera Classic EPLD |
| Architecture | PAL-type AND-OR sum-of-products, CMOS | β |
| Gate Count | 900 usable gates | β |
| Macrocells | 24 | 24 |
| Propagation Delay (tPD) | 30 ns (max) | 35 ns |
| Clock Frequency (fCNT) | 33.3 MHz | β |
| Dedicated Inputs | 36 | 10 |
| Outputs (Macrocells) | 24 | β |
| External Clock Pins | 2 (CLK1, CLK2) | β |
| Supply Voltage | 5 V | β |
| Process Technology | CMOS | β |
| Programming Method | UV-Erasable / OTP | EPROM programmer + JEDEC fuse map |
| Package | DIP-40 (through-hole, 600 mil) | CDIP-40 (Ceramic DIP with UV window) |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Mounting Type | Through-Hole | Through-Hole |
| Product Type | β | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | β | 450 |
| Maximum Toggle Frequency (fCNT) | β | 28.6 MHz |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V nominal) |
| Supply Current (ICC) | β | 40 mA typical |
| Bidirectional I/O Pins | β | 20 |
| Total Pins | β | 40 |
| Technology | β | CMOS, UV-erasable EPROM |
| Erasure Method | β | UV light through quartz window |
| RoHS Status | β | [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified] |
| Logic Family | β | PAL-type AND/OR array with D flip-flops |
| Manufacturer | β | Original Altera; long-term authorized by Rochester Electronics, LLC |