EP910DC-30 vs EP910DI-35 Perbandingan

Perbandingan bersamaan detil EP910DC-30 dari Intel dan EP910DI-35 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP910DC-30 EP910DI-35
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Aktif
Family Classic EPLD (EP910 series) Altera Classic EPLD
Architecture PAL-type AND-OR sum-of-products, CMOS —
Gate Count 900 usable gates —
Macrocells 24 24
Propagation Delay (tPD) 30 ns (max) 35 ns
Clock Frequency (fCNT) 33.3 MHz —
Dedicated Inputs 36 10
Outputs (Macrocells) 24 —
External Clock Pins 2 (CLK1, CLK2) —
Tegangan Pemuat 5 V —
Process Technology CMOS —
Programming Method UV-Erasable / OTP EPROM programmer + JEDEC fuse map
Paket DIP-40 (through-hole, 600 mil) CDIP-40 (Ceramic DIP with UV window)
Suhu Kerja 0C to +70C (commercial) -40C to +85C (industrial)
Tipe Mounting Through-Hole Through-Hole
Product Type — EPLD (Erasable Programmable Logic Device)
Usable Gates — 450
Maximum Toggle Frequency (fCNT) — 28.6 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Supply Current (ICC) — 40 mA typical
Bidirectional I/O Pins — 20
Total Pins — 40
Technology — CMOS, UV-erasable EPROM
Erasure Method — UV light through quartz window
Status RoHS — [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified]
Logic Family — PAL-type AND/OR array with D flip-flops
Manufacturer — Original Altera; long-term authorized by Rochester Electronics, LLC

Spek dan Sumber

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