EP910DM-40 vs EP910DI-35 Comparison

Detailed side-by-side comparison of EP910DM-40 by Altera and EP910DI-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910DM-40 EP910DI-35
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $21.00 $35.20
Product Type UV Erasable Programmable Logic Device (EPLD) EPLD (Erasable Programmable Logic Device)
Family Altera Classic EP910 Altera Classic EPLD
Architecture PAL-type AND/OR with global programmable interconnect bus β€”
Macrocells 24 24
Dedicated Inputs 36 10
Dedicated Outputs 24 β€”
Bidirectional I/O Lines 24 β€”
Product Terms 240 β€”
Propagation Delay (tPD) 40 ns 35 ns
External Clocks 2 β€”
Process Technology CMOS β€”
Package 40-pin Ceramic DIP (Cerdip) with UV window CDIP-40 (Ceramic DIP with UV window)
Mounting Type Through-Hole (DIP) Through-Hole
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
Supply Voltage 5 V β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified]
Programming Interface JEDEC-standard fuse-map / UV erasure β€”
Usable Gates β€” 450
Maximum Toggle Frequency (fCNT) β€” 28.6 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Supply Current (ICC) β€” 40 mA typical
Bidirectional I/O Pins β€” 20
Total Pins β€” 40
Technology β€” CMOS, UV-erasable EPROM
Programming Method β€” EPROM programmer + JEDEC fuse map
Erasure Method β€” UV light through quartz window
Logic Family β€” PAL-type AND/OR array with D flip-flops
Manufacturer β€” Original Altera; long-term authorized by Rochester Electronics, LLC

Datasheets & Resources

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