EP910DM-40 vs EP910DI-35 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910DM-40 disebabkan oleh Altera dan EP910DI-35 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910DM-40 EP910DI-35
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Aktif
Product Type UV Erasable Programmable Logic Device (EPLD) EPLD (Erasable Programmable Logic Device)
Family Altera Classic EP910 Altera Classic EPLD
Architecture PAL-type AND/OR with global programmable interconnect bus —
Macrocells 24 24
Dedicated Inputs 36 10
Dedicated Outputs 24 —
Bidirectional I/O Lines 24 —
Product Terms 240 —
Propagation Delay (tPD) 40 ns 35 ns
External Clocks 2 —
Process Technology CMOS —
Kemasan 40-pin Ceramic DIP (Cerdip) with UV window CDIP-40 (Ceramic DIP with UV window)
Jenis Pemasangan Through-Hole (DIP) Through-Hole
Suhu Operasi [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
Tegangan Pemberi Arus 5 V —
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified]
Programming Interface JEDEC-standard fuse-map / UV erasure —
Usable Gates — 450
Maximum Toggle Frequency (fCNT) — 28.6 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Supply Current (ICC) — 40 mA typical
Bidirectional I/O Pins — 20
Total Pins — 40
Technology — CMOS, UV-erasable EPROM
Programming Method — EPROM programmer + JEDEC fuse map
Erasure Method — UV light through quartz window
Logic Family — PAL-type AND/OR array with D flip-flops
Manufacturer — Original Altera; long-term authorized by Rochester Electronics, LLC

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga