EP910LC-35T vs EP910LC-35H Comparison
Detailed side-by-side comparison of EP910LC-35T by Altera and EP910LC-35H by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-35T | EP910LC-35H |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $28.90 | $25.00 |
| Family | Classic EPLD (EP910) | Classic EPLD (EP910) |
| Logic Capacity | 450 usable gates | β |
| Macrocells | 24 | β |
| Propagation Delay (tPD) | 35 ns | β |
| Maximum Operating Frequency | 28.6 MHz | β |
| Supply Voltage (VCC) | 5 V | 5 V (4.75 V to 5.25 V) |
| User I/O Pins | 36 | 36 |
| Package | PLCC-44 (J-lead) | 40-pin Ceramic DIP (H suffix) |
| Process Technology | CMOS (EPROM-based) | β |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range grade] |
| Erasure Method | UV-erasable window (ceramic package) / OTP (plastic) | UV (quartz window on H package) |
| Programming | Altera programming hardware + MAX+PLUS II | β |
| Mounting Type | Surface Mount (PLCC socket or solder) | Through-hole (Ceramic DIP) |
| MSL Level | MSL 3 (168 hours) | β |
| RoHS Status | [DATA_NEEDED: RoHS status not in verified data] | unknown |
| Logic Elements | β | 24 macrocells |
| Equivalent Gates | β | 450 usable gates |
| Propagation Delay (tpd) | β | 35 ns |
| Technology | β | CMOS, UV-erasable EPROM |
| Dedicated Inputs | β | 10 |
| Programming Method | β | Altera hardware programmer |
| Logic Levels | β | TTL compatible |
| Quiescent Current | β | [DATA_NEEDED: typical ICC value] |
| Process Node | β | [DATA_NEEDED: process geometry] |
| Lifecycle | β | Obsolete (long-term supply via Rochester Electronics) |