EP910PC-15T vs EP910LC-40 Comparison

Detailed side-by-side comparison of EP910PC-15T by Altera and EP910LC-40 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910PC-15T EP910LC-40
Brand Altera Rochester Electronics
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Product Type EPLD (Erasable Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Family Altera Classic EPLD —
Macrocell Count 24 —
Dedicated Input Pins 10 —
Pin-to-Pin Delay (tPD) 15 ns —
Speed Grade -15 (15 ns) —
Supply Voltage (VCC) 5 V (nominal) 5 V (single supply)
Technology CMOS, UV-erasable / OTP CMOS EPROM
Package 40-pin PDIP (Plastic DIP) PQCC-44 (Plastic Leaded Chip Carrier, J-lead)
Mounting Type Through-hole (DIP) —
Output Drive Current [DATA_NEEDED: IOL per output] —
Operating Temperature 0C to +70C (commercial) —
Logic Capacity 24 macrocells / 72 product terms (typical Classic architecture) —
Programming Method JEDEC fuse map via Altera LogicMap / MAX+PLUS II Altera Logic Programmer (PLAD-J), 4-wire serial
RoHS Status [DATA_NEEDED: RoHS compliance status] Not applicable (legacy)
Lead-Free [DATA_NEEDED: lead-free status] —
Security Bit Yes (design protection) —
Tape and Reel Yes (suffix T) —
Manufacturer — Rochester Electronics (Altera original)
Device Family — Altera Classic EPLD - EP910
Usable Gates — 450
Macrocells — 24
Logic Array Blocks — 2 (12 macrocells each)
Propagation Delay (tPD) — 40 ns
Maximum Toggle Frequency (fMAX) — 25 MHz
User I/O Pins — 36
Dedicated Inputs — 4
Operating Temperature (Commercial) — 0 C to +70 C
Lead-Free Status — Not applicable

Datasheets & Resources

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