EP910PI-20T vs EP910PI-12T 比較
詳細並排比較 EP910PI-20T 由 Intel 與 EP910PI-12T 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910PI-20T | EP910PI-12T |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Number of Macrocells | 24 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tpd) | 20 ns | — |
| Maximum Toggle Frequency | 62.5 MHz | — |
| Number of Dedicated Inputs | 12 | — |
| Number of I/O Pins | 20 | — |
| 腳位數 | 40 | — |
| 封裝 | PDIP-40 (PI) | 40-pin PDIP (Plastic DIP) |
| 安裝類型 | Through-Hole (DIP) | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Programming | Standard EPROM programmer, JEDEC map | — |
| RoHS 狀態 | unknown | Non-compliant (legacy PDIP package, contains lead) |
| 生命週期狀態 | Not Recommended for New Designs (NRND) | NRND / EOL (mature legacy product) |
| Macrocells | — | 24 |
| Propagation Delay (tPD) | — | 12 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Supply Voltage (VCC) | — | 5 V (4.75 V min, 5.25 V max) |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 12 |
| External Clock Inputs | — | 2 |
| Outputs | — | 24 |
| Terminals / Pin Count | — | 44 (PDIP-40 package pinout with NC pins) |
| Process Technology | — | CMOS |
| Programmable Technology | — | UV-erasable EPROM |
| Programming Interface | — | JEDEC-standard |