EP910PI-20T vs EP910PI-20 Comparison

Detailed side-by-side comparison of EP910PI-20T by Intel and EP910PI-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910PI-20T EP910PI-20
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $9.75
Family Altera Classic EPLD β€”
Device EP910 β€”
Number of Macrocells 24 β€”
Number of Usable Gates [DATA_NEEDED: usable gate count] β€”
Propagation Delay (tpd) 20 ns β€”
Maximum Toggle Frequency 62.5 MHz β€”
Number of Dedicated Inputs 12 β€”
Number of I/O Pins 20 β€”
Number of Pins 40 β€”
Package PDIP-40 (PI) PDIP-40 (PI suffix)
Mounting Type Through-Hole (DIP) Through-Hole
Technology CMOS EPROM (UV-erasable) CMOS EPROM (UV-erasable windowed variants available)
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
Programming Standard EPROM programmer, JEDEC map β€”
RoHS Status unknown unknown
Lifecycle Status Not Recommended for New Designs (NRND) β€”
Device Family β€” Altera Classic EPLD Family
Macrocells β€” 24
Propagation Delay (tPD) β€” 20 ns
Supply Voltage (VCC) β€” 5 V (+/- 5%)
Configuration Method β€” Non-volatile EPROM (no boot PROM required)
Dedicated Inputs β€” 12
Bidirectional I/O Pins β€” 24
Maximum Counter Frequency β€” 125 MHz
Output Drive Current (IOL) β€” 24 mA (TTL-compatible)
Programmable Polarity β€” Yes (XOR gate per macrocell)
Macrocell Flip-Flop β€” Yes (D-type, programmable)
Power Dissipation β€” [DATA_NEEDED: typical power dissipation in mW]
Programming Interface β€” JEDEC file via Altera programming hardware
MIL-STD-883 Variant β€” EP910DM/883B (separate part number)

Datasheets & Resources

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