EPM240M100C5N vs EPM240M100C4N Comparison

Detailed side-by-side comparison of EPM240M100C5N by Intel and EPM240M100C4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM240M100C5N EPM240M100C5N - MAX II CPLD 192MC 80 I/O | Intel

EPM240M100C5N - MAX II CPLD 192MC 80 I/O | Intel

EPM240M100C5N ⚠ Last Time Buy

Specification Comparison

Parameter EPM240M100C5N EPM240M100C4N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Active
Stock Status In Stock In Stock
Unit Price (USD) $4.25 $7.45
Family MAX II β€”
Logic Elements 240 β€”
Macrocells 192 β€”
User I/Os 80 80
Propagation Delay (tPD) 4.7 ns β€”
User Flash Memory 8 Kbits 8 Kbit
Supply Voltage - Core 1.8 V 2.5 V / 3.3 V
Supply Voltage - I/O 1.5 V / 1.8 V / 2.5 V / 3.3 V β€”
Operating Temperature -40 C to +125 C -40 C to +125 C (industrial)
Package 100-ball MBGA (Micro FBGA), 6 x 6 mm, 0.5 mm pitch 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch
Mounting Type Surface Mount Surface Mount (BGA)
Process Technology 0.18 Β΅m CMOS β€”
Configuration Memory On-chip Flash (non-volatile) Non-volatile on-chip flash (instant-on)
JTAG Support IEEE 1149.1 boundary-scan β€”
RoHS Status Compliant (lead-free) Lead Free (per DigiChip spec sheet)
Logic Family CMOS CMOS
Series β€” MAX II
Device Family β€” EPM240
Macro Cells β€” 192
Propagation Delay (tPD) Max β€” 4.7 ns
Internal Operating Frequency β€” 247.5 MHz
I/O Standards Supported β€” 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL
Programmability β€” In-System Programmable via JTAG (IEEE 1149.1)
Logic Array Blocks (LABs) β€” 4 (16 macrocells per LAB)
MultiTrack Interconnect β€” Yes
Hot Socketing β€” Yes

Datasheets & Resources

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