EPM240ZM68C6N vs EPM240GM100C5N Comparison
Detailed side-by-side comparison of EPM240ZM68C6N by Intel and EPM240GM100C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N β ActiveSpecification Comparison
| Parameter | EPM240ZM68C6N | EPM240GM100C5N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.10 | $4.75 |
| Family | MAX II Z (CPLD) | MAX II G |
| Macrocells | 192 | β |
| Logic Elements (LE) | 240 | β |
| Maximum Propagation Delay (tPD) | 7.5 ns | β |
| Internal Performance (fMAX) | 184.1 MHz | β |
| Process Technology | 0.18 Β΅m | CMOS, Flash-based |
| User I/O Count | 80 | β |
| Number of I/O Banks | 4 | β |
| Core Supply Voltage (VCCINT) | 1.8 V | β |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) | β |
| Package | 68-ball Micro FBGA (MBGA-68) | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | Non-volatile Flash |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | JTAG (IEEE 1149.1) - ISP |
| Operating Temperature Range | -40Β°C to +85Β°C (commercial, 'C' suffix) | β |
| RoHS Status | Compliant | β |
| Lead-Free Finish | Yes | β |
| MSL Level | 3 (per JEDEC J-STD-020) | 3 |
| Logic Elements | β | 240 (192 macrocells) |
| User I/Os | β | 80 |
| Pin-to-Pin Delay (tPD) | β | 4.7 ns |
| Ball Pitch | β | 0.5 mm |
| Supply Voltage - Core | β | 3.3 V |
| I/O Voltage Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Operating Temperature | β | -40 C to +125 C |
| Lead Free / RoHS | β | Yes / Compliant |