EPM240ZM68C6N vs EPM240GM100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240ZM68C6N sa pamamagitan ng Intel at EPM240GM100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM240ZM68C6N | EPM240GM100C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II Z (CPLD) | MAX II G |
| Macrocells | 192 | — |
| Logic Elements (LE) | 240 | — |
| Maximum Propagation Delay (tPD) | 7.5 ns | — |
| Internal Performance (fMAX) | 184.1 MHz | — |
| Process Technology | 0.18 µm | CMOS, Flash-based |
| User I/O Count | 80 | — |
| Number of I/O Banks | 4 | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) | — |
| Packhaging | 68-ball Micro FBGA (MBGA-68) | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | Non-volatile Flash |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | JTAG (IEEE 1149.1) - ISP |
| Hanay ng Temperature na Operasyon | -40°C to +85°C (commercial, 'C' suffix) | — |
| Tindminan RoHS | Compliant | — |
| Lead-Free Finish | Yes | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | 3 |
| Logic Elements | — | 240 (192 macrocells) |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Ball Pitch | — | 0.5 mm |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Temperature na Operasyon | — | -40 C to +125 C |
| Lead Free / RoHS | — | Yes / Compliant |