EPM3128ATC100-10N vs EPM3128ATC144-10 Comparison

Detailed side-by-side comparison of EPM3128ATC100-10N by Altera and EPM3128ATC144-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3128ATC100-10N EPM3128ATC144-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Active
Stock Status In Stock In Stock
Unit Price (USD) $5.20 $6.20
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 128 128
Usable Gates 2500 2,500 (typical)
Number of I/O 80 β€”
Logic Elements / Blocks 8 LABs (16 macrocells each) β€”
Propagation Delay (tPD) 10 ns 10 ns (speed grade -10)
Maximum Internal Frequency (fMAX) 98 MHz β€”
Supply Voltage VCCINT 3.3 V β€”
I/O Bank Voltage VCCIO 3.3 V or 2.5 V (selectable) β€”
Configuration Memory CMOS EEPROM (non-volatile, instant-on) EEPROM (non-volatile, instant-on)
In-System Programming IEEE Std. 1532-compliant ISP via JTAG β€”
Package 100-pin TQFP (14 x 14 x 1.0 mm) 144-pin TQFP (TQ144)
Operating Temperature 0 Β°C to +70 Β°C (commercial) 0C to +70C (commercial)
Mounting Type Surface Mount Surface Mount
RoHS Status Compliant Compliant
Lead-Free Yes Yes
MSL Level 3 (per JEDEC J-STD-020) β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
User I/Os β€” 96
Logic Elements / LABs β€” 4 Logic Array Blocks
Counter Frequency (fCNT) β€” Up to 227.3 MHz
Supply Voltage (VCCINT) β€” 3.3 V
MultiVolt I/O Interface β€” 1.5V / 1.8V / 2.5V / 3.3V
In-System Programmability β€” IEEE Std. 1532 compliant
Boundary-Scan Test β€” IEEE Std. 1149.1 (JTAG)

Datasheets & Resources

Browse All Products Create BOM Request Quote