EPM3128ATC100-10N vs EPM3128ATC144-10 对比
详细并排对比 EPM3128ATC100-10N 出自 Altera 和 EPM3128ATC144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3128ATC100-10N - 128-Macrocell MAX 3000A CPLD, 10ns, TQFP-100 | Intel
EPM3128ATC100-10N Nrnd
规格对比
| 参数 | EPM3128ATC100-10N | EPM3128ATC144-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $5.20 | $6.20 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | 128 |
| Usable Gates | 2500 | 2,500 (typical) |
| Number of I/O | 80 | — |
| Logic Elements / Blocks | 8 LABs (16 macrocells each) | — |
| Propagation Delay (tPD) | 10 ns | 10 ns (speed grade -10) |
| Maximum Internal Frequency (fMAX) | 98 MHz | — |
| Supply Voltage VCCINT | 3.3 V | — |
| I/O Bank Voltage VCCIO | 3.3 V or 2.5 V (selectable) | — |
| Configuration Memory | CMOS EEPROM (non-volatile, instant-on) | EEPROM (non-volatile, instant-on) |
| In-System Programming | IEEE Std. 1532-compliant ISP via JTAG | — |
| 封装 | 100-pin TQFP (14 x 14 x 1.0 mm) | 144-pin TQFP (TQ144) |
| 工作温度 | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| MSL 等级 | 3 (per JEDEC J-STD-020) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 96 |
| Logic Elements / LABs | — | 4 Logic Array Blocks |
| Counter Frequency (fCNT) | — | Up to 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| MultiVolt I/O Interface | — | 1.5V / 1.8V / 2.5V / 3.3V |
| In-System Programmability | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |