EPM3128ATI100-5N vs EPM3128ATC100-10N Comparison

Detailed side-by-side comparison of EPM3128ATI100-5N by Intel and EPM3128ATC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3128ATI100-5N EPM3128ATC100-10N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $11.45 $5.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 128 β€”
Logic Array Blocks (LABs) 8 (16 macrocells per LAB) β€”
User I/O Pins 80 β€”
Pin-to-Pin Delay (tPD) 5.0 ns β€”
Supply Voltage (VCCINT) 3.3 V β€”
I/O Standard 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs β€”
Programming Method In-System Programmable via IEEE Std. 1532 (JTAG) β€”
Operating Temperature -40C to +85C (Industrial) 0 Β°C to +70 Β°C (commercial)
Package 100-pin TQFP 100-pin TQFP (14 x 14 x 1.0 mm)
Mounting Type Surface Mount Surface Mount
Configuration Memory Non-volatile EEPROM CMOS EEPROM (non-volatile, instant-on)
JTAG Support IEEE 1149.1 boundary scan β€”
RoHS Status Compliant (lead-free TQFP package) Compliant
Product Type β€” CPLD (Complex Programmable Logic Device)
Macro Cells β€” 128
Usable Gates β€” 2500
Number of I/O β€” 80
Logic Elements / Blocks β€” 8 LABs (16 macrocells each)
Propagation Delay (tPD) β€” 10 ns
Maximum Internal Frequency (fMAX) β€” 98 MHz
Supply Voltage VCCINT β€” 3.3 V
I/O Bank Voltage VCCIO β€” 3.3 V or 2.5 V (selectable)
In-System Programming β€” IEEE Std. 1532-compliant ISP via JTAG
Lead-Free β€” Yes
MSL Level β€” 3 (per JEDEC J-STD-020)

Datasheets & Resources

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