EPM3128ATI100-5N vs EPM3128ATC100-10N Vergleich
Detaillierter Direktvergleich von EPM3128ATI100-5N von Intel und EPM3128ATC100-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N ✓ AktivAltera
EPM3128ATC100-10N - 128-Macrocell MAX 3000A CPLD, 10ns, TQFP-100 | Intel
EPM3128ATC100-10N NrndSpezifikationsvergleich
| Parameter | EPM3128ATI100-5N | EPM3128ATC100-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,45 | $5,20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells per LAB) | — |
| User I/O Pins | 80 | — |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standard | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs | — |
| Programming Method | In-System Programmable via IEEE Std. 1532 (JTAG) | — |
| Betriebstemperatur | -40C to +85C (Industrial) | 0 °C to +70 °C (commercial) |
| Gehäuse | 100-pin TQFP | 100-pin TQFP (14 x 14 x 1.0 mm) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Memory | Non-volatile EEPROM | CMOS EEPROM (non-volatile, instant-on) |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| RoHS-Status | Compliant (lead-free TQFP package) | Compliant |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 128 |
| Usable Gates | — | 2500 |
| Number of I/O | — | 80 |
| Logic Elements / Blocks | — | 8 LABs (16 macrocells each) |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency (fMAX) | — | 98 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Bank Voltage VCCIO | — | 3.3 V or 2.5 V (selectable) |
| In-System Programming | — | IEEE Std. 1532-compliant ISP via JTAG |
| Lead-Free | — | Yes |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |