EPM3256ATI144-10N vs EPM3256ATI144-10 Comparison

Detailed side-by-side comparison of EPM3256ATI144-10N by Altera and EPM3256ATI144-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256ATI144-10N EPM3256ATI144-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.25 $0.00
Family MAX 3000A β€”
Device Type CPLD - Complex Programmable Logic Device β€”
Macrocells 256 β€”
Usable Gates 5,000 β€”
User I/Os 116 β€”
Logic Blocks / Logic Elements 16 β€”
Propagation Delay (tPD) 10 ns β€”
Max Frequency (fMAX) 95.2 MHz β€”
Supply Voltage - Core 3.3 V β€”
I/O Voltage Support 1.8 V / 2.5 V / 3.3 V (multi-voltage) MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed
In-System Programmability Yes, IEEE Std. 1532 compliant β€”
Boundary-Scan Test (BST) Yes, IEEE Std. 1149.1 (JTAG) β€”
Package 144-pin TQFP 144-pin TQFP (20x20 mm)
Operating Temperature -40 C to +85 C (industrial, "I" suffix) -40Β°C to +85Β°C (industrial)
Lead-Free / Pb-Free Yes ("N" suffix) β€”
RoHS Status Compliant β€”
Process Technology CMOS EEPROM-based, non-volatile β€”
Mounting Type Surface Mount Surface Mount
MSL Level 3 (per JEDEC J-STD-020, typical for TQFP) β€”
Series β€” MAX 3000A
Programmable Type β€” In-System Programmable (ISP), EEPROM-based
Number of Macrocells β€” 256
Number of Logic Elements / Blocks β€” 16 LABs (Logic Array Blocks)
Number of Gates β€” 5,000 typical usable gates
Number of User I/O β€” 116
Propagation Delay (tpd max) β€” 10 ns
Maximum Frequency (fmax) β€” 95.2 MHz
Supply Voltage (VCCINT) β€” 3.0 V to 3.6 V (3.3 V nominal)
Logic Family β€” CMOS, EEPROM-based
Programming Interface β€” JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP
Compliance β€” IEEE Std. 1532 ISP, PCI-compatible I/O
Lifecycle Status β€” Obsolete (per HighqualityPCB listing)

Datasheets & Resources

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