EPM3256ATI144-10N vs EPM3256ATI144-10 对比

详细并排对比 EPM3256ATI144-10N 出自 Altera 和 EPM3256ATI144-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256ATI144-10N EPM3256ATI144-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $10.25 $0.00
Family MAX 3000A —
Device Type CPLD - Complex Programmable Logic Device —
Macrocells 256 —
Usable Gates 5,000 —
User I/Os 116 —
Logic Blocks / Logic Elements 16 —
Propagation Delay (tPD) 10 ns —
Max Frequency (fMAX) 95.2 MHz —
Supply Voltage - Core 3.3 V —
I/O Voltage Support 1.8 V / 2.5 V / 3.3 V (multi-voltage) MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed
In-System Programmability Yes, IEEE Std. 1532 compliant —
Boundary-Scan Test (BST) Yes, IEEE Std. 1149.1 (JTAG) —
封装 144-pin TQFP 144-pin TQFP (20x20 mm)
工作温度 -40 C to +85 C (industrial, "I" suffix) -40°C to +85°C (industrial)
Lead-Free / Pb-Free Yes ("N" suffix) —
RoHS 状态 Compliant —
Process Technology CMOS EEPROM-based, non-volatile —
安装类型 Surface Mount Surface Mount
MSL 等级 3 (per JEDEC J-STD-020, typical for TQFP) —
Series — MAX 3000A
Programmable Type — In-System Programmable (ISP), EEPROM-based
Number of Macrocells — 256
Number of Logic Elements / Blocks — 16 LABs (Logic Array Blocks)
Number of Gates — 5,000 typical usable gates
Number of User I/O — 116
Propagation Delay (tpd max) — 10 ns
Maximum Frequency (fmax) — 95.2 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
Logic Family — CMOS, EEPROM-based
Programming Interface — JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP
Compliance — IEEE Std. 1532 ISP, PCI-compatible I/O
生命周期状态 — Obsolete (per HighqualityPCB listing)

数据手册与资源

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