EPM3512AFC256-10N vs EPM3512AFC256-18 Comparison
Detailed side-by-side comparison of EPM3512AFC256-10N by Altera and EPM3512AFC256-18 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AFC256-18 - MAX 3000A CPLD, 512 Macrocells, BGA-256 | Altera
EPM3512AFC256-18 ObsoleteSpecification Comparison
| Parameter | EPM3512AFC256-10N | EPM3512AFC256-18 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $43.22 | $17.20 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Usable Gates | 10000 | β |
| User I/O Pins | 208 | β |
| Logic Array Blocks (LABs) | [DATA_NEEDED: number of LABs] | 16 |
| Operating Frequency (fMAX) | [DATA_NEEDED: fMAX MHz] | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Setup Time (tSU) | 4.5 ns | β |
| VCCINT (Core Supply) | 3.3 V | 3.0 V to 3.6 V (3.3 V typical) |
| VCCIO (I/O Supply) | 3.3 V or 2.5 V | 2.5 V or 3.3 V (MultiVolt) |
| Technology | CMOS EEPROM-based, non-volatile | β |
| Operating Temperature (Commercial) | 0 C to +70 C | β |
| Package | 256-ball FBGA (17 mm x 17 mm) | 256-ball FineLine BGA (FCBGA) |
| ISP Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not specified in retrieved data] |
| Maximum User I/O Pins | β | 212 |
| Pin-to-Pin Delay (tPD1) | β | 18 ns |
| Global Clock Networks | β | 4 |
| Operating Temperature | β | [DATA_NEEDED: industrial/commercial grade] |
| Programming Technology | β | EEPROM (non-volatile) |
| In-System Programming | β | IEEE Std. 1532 / JTAG (IEEE Std. 1149.1) |
| Ball Pitch | β | 1.0 mm |