EPM3512AFC256-3N vs EPM3512AFC256-7 Comparison

Detailed side-by-side comparison of EPM3512AFC256-3N by Altera and EPM3512AFC256-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-3N EPM3512AFC256-7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Last Time Buy
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 512 512
Usable Gates 10,000 10,000
Logic Array Blocks (LABs) 16 16
Maximum Operating Frequency 116.3 MHz —
Pin-to-Pin Delay (tPD) 3.5 ns (speed grade -3) —
Speed Grade -3 (slowest in family) —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
Package 256-ball FineLine BGA (FC-256) 256-ball FineLine BGA (FBGA-256)
Mounting Type Surface Mount Surface Mount
Programming Interface JTAG (IEEE 1149.1) / IEEE Std. 1532 ISP —
Configuration Memory Non-volatile EEPROM Non-volatile EEPROM
Operating Temperature [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: operating temperature grade]
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
User I/O Pins — 212
Pin-to-Pin Logic Delay — 7.5 ns
Counter Frequency (max) — 227.3 MHz
Supply Voltage - Core (VCCINT) — 3.0 V to 3.6 V (3.3 V typ.)
I/O Voltage (VCCIO) — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming — EEPROM, IEEE 1149.1 JTAG ISP (IEEE 1532-compliant)

Datasheets & Resources

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