EPM3512AFI256-10 vs EPM3512AFC256-7N Comparison

Detailed side-by-side comparison of EPM3512AFI256-10 by Intel and EPM3512AFC256-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFI256-10 EPM3512AFC256-7N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.75 $61.00
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Equivalent Gates 10,000 β€”
Macrocells 512 512
User I/Os 208 208
Pin-to-Pin Logic Delay (tPD) 4.5 ns β€”
Maximum Counter Frequency 227.3 MHz β€”
Propagation Delay 7.5 ns (max, per chipdig summary) β€”
Core Voltage 3.3 V β€”
MultiVolt I/O Levels 5.0 V / 3.3 V / 2.5 V β€”
Process Technology CMOS EEPROM CMOS EEPROM, 0.30 um
In-System Programmability Yes, IEEE Std. 1532 (3.3 V ISP) IEEE Std. 1532 compliant
Package FBGA-256 (FineLine BGA, 256 balls) 256-pin FineLine BGA (FBGA-256), 1.0 mm pitch
Operating Temperature 0C to +70C (commercial) 0 C to 70 C (commercial)
Logic Family CMOS β€”
RoHS Status [DATA_NEEDED: rohs_status] [DATA_NEEDED: RoHS status]
Supply Voltage 3.3 V (core); MultiVolt I/O to 5.0 V β€”
Usable Gates β€” 10,000
Logic Blocks β€” 16 (32 macrocells each)
Propagation Delay (tPD) β€” 7.5 ns
Maximum Internal Frequency (fMAX) β€” 116.3 MHz
Core Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 3.3 V or 2.5 V
5V Tolerant I/O β€” Yes
Programming Interface β€” JTAG (IEEE 1149.1)
Mounting Type β€” Surface Mount

Datasheets & Resources

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