EPM3512AFI256-10 vs EPM3512AFC256-7N Perbandingan
Perbandingan bersamaan detil EPM3512AFI256-10 dari Intel dan EPM3512AFC256-7N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM3512AFC256-7N - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera
EPM3512AFC256-7N ObsoletePerbandingan Spesifikasi
| Parameter Umum | EPM3512AFI256-10 | EPM3512AFC256-7N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Equivalent Gates | 10,000 | — |
| Macrocells | 512 | 512 |
| User I/Os | 208 | 208 |
| Pin-to-Pin Logic Delay (tPD) | 4.5 ns | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Propagation Delay | 7.5 ns (max, per chipdig summary) | — |
| Core Voltage | 3.3 V | — |
| MultiVolt I/O Levels | 5.0 V / 3.3 V / 2.5 V | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM, 0.30 um |
| In-System Programmability | Yes, IEEE Std. 1532 (3.3 V ISP) | IEEE Std. 1532 compliant |
| Paket | FBGA-256 (FineLine BGA, 256 balls) | 256-pin FineLine BGA (FBGA-256), 1.0 mm pitch |
| Suhu Kerja | 0C to +70C (commercial) | 0 C to 70 C (commercial) |
| Logic Family | CMOS | — |
| Status RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS status] |
| Tegangan Pemuat | 3.3 V (core); MultiVolt I/O to 5.0 V | — |
| Usable Gates | — | 10,000 |
| Logic Blocks | — | 16 (32 macrocells each) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 116.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant I/O | — | Yes |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Tipe Mounting | — | Surface Mount |