EPM3512AFI256-7 vs EPM3512AFC256-7 Comparison

Detailed side-by-side comparison of EPM3512AFI256-7 by Altera and EPM3512AFC256-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFI256-7 EPM3512AFC256-7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $15.95 $58.40
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 512 512
Usable Gates 10,000 10,000
Logic Array Blocks (LABs) 32 (16 macrocells each) 16
User I/O Pins 208 212
Pin-to-Pin Delay (tPD) 7.5 ns β€”
Maximum Operating Frequency [DATA_NEEDED: fMAX value] β€”
Supply Voltage VCCINT 3.3 V β€”
MultiVolt I/O Voltage 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant β€”
Process Technology 0.30 Β΅m CMOS EEPROM β€”
Package 256-ball FBGA (Fine-Pitch BGA), 17 mm Γ— 17 mm, 1.0 mm pitch 256-ball FineLine BGA (FBGA-256)
In-System Programmability IEEE Std. 1532 compliant via JTAG β€”
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) β€”
Operating Temperature (Industrial) -40 Β°C to +85 Β°C β€”
RoHS Status [DATA_NEEDED: confirm from data] [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount (BGA) Surface Mount
Pin-to-Pin Logic Delay β€” 7.5 ns
Counter Frequency (max) β€” 227.3 MHz
Supply Voltage - Core (VCCINT) β€” 3.0 V to 3.6 V (3.3 V typ.)
I/O Voltage (VCCIO) β€” 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming β€” EEPROM, IEEE 1149.1 JTAG ISP (IEEE 1532-compliant)
Operating Temperature β€” [DATA_NEEDED: operating temperature grade]
Configuration Memory β€” Non-volatile EEPROM

Datasheets & Resources

Browse All Products Create BOM Request Quote