EPM5128LC2 vs EPM5128GC-1 Comparison
Detailed side-by-side comparison of EPM5128LC2 by Altera and EPM5128GC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5128LC2 | EPM5128GC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | UV-erasable CMOS CPLD |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | 16 ns (typical, -1 speed grade) |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS EPROM | — |
| Configuration Memory | On-chip EPROM (non-volatile) | — |
| Boundary Scan | JTAG / IEEE 1149.1 | — |
| Operating Temperature | -40 C to +85 C (extended commercial) | -40C to +85C (industrial) |
| Package | PGA (Pin Grid Array, ceramic) | PGA-96+ (Pin Grid Array, ceramic windowed) |
| Mounting Type | Through-Hole / Socketed | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] |
| Usable Gates | — | 2,500 |
| Dedicated Inputs | — | 7 |
| Maximum User I/O Pins | — | 52 |
| Nominal Supply Voltage | — | 5 V |
| Supply Voltage Range | — | 4.75 V to 5.25 V |
| Maximum Operating Frequency | — | 62.5 MHz |
| Technology | — | CMOS, UV-erasable EPROM |
| IOL / IOH | — | 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) |
| Security Bit | — | Programmable, prevents readback |
| Programming Method | — | UV erase + EPROM program (or device programmer) |
| MSL Level | — | [DATA_NEEDED: MSL level] |