EPM5128LC2 vs EPM5128GC-1 比較
詳細な並列比較: EPM5128LC2 メーカー: Altera および EPM5128GC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5128LC2 | EPM5128GC-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $22.40 | $18.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | UV-erasable CMOS CPLD |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | 16 ns (typical, -1 speed grade) |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS EPROM | — |
| Configuration Memory | On-chip EPROM (non-volatile) | — |
| Boundary Scan | JTAG / IEEE 1149.1 | — |
| 動作温度 | -40 C to +85 C (extended commercial) | -40C to +85C (industrial) |
| パッケージ | PGA (Pin Grid Array, ceramic) | PGA-96+ (Pin Grid Array, ceramic windowed) |
| 実装タイプ | Through-Hole / Socketed | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] |
| Usable Gates | — | 2,500 |
| Dedicated Inputs | — | 7 |
| Maximum User I/O Pins | — | 52 |
| Nominal Supply Voltage | — | 5 V |
| Supply Voltage Range | — | 4.75 V to 5.25 V |
| Maximum Operating Frequency | — | 62.5 MHz |
| Technology | — | CMOS, UV-erasable EPROM |
| IOL / IOH | — | 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) |
| Security Bit | — | Programmable, prevents readback |
| Programming Method | — | UV erase + EPROM program (or device programmer) |
| MSLレベル | — | [DATA_NEEDED: MSL level] |