EPM5192AJC84-20 vs EPM5192AJC-25 Comparison

Detailed side-by-side comparison of EPM5192AJC84-20 by Altera and EPM5192AJC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192AJC84-20 EPM5192AJC-25
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.20 $8.20
Family MAX 5000 MAX 5000 EPLD
Device Type UV-erasable/OTP Complex PLD (CPLD) β€”
Macrocells 192 192
Propagation Delay (tpd) 33 ns (speed grade -20) β€”
Maximum Clock Frequency 66.7 MHz β€”
Supply Voltage (Vcc) 4.75 V to 5.25 V β€”
Dedicated Inputs 7 β€”
User I/O Lines 64 β€”
Process Technology CMOS, UV-erasable EEPROM β€”
Package 84-pin PLCC J-Lead (WQCCJ, J84) PLCC-68 (windowed ceramic, AJC)
Operating Temperature Grade Commercial β€”
Mounting Type Surface Mount (J-Lead) Surface Mount
MSL Level [DATA_NEEDED: MSL level] β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Programming Tool Altera MAX+PLUS II / Quartus (legacy) β€”
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free status] β€”
Manufacturer β€” Altera (now Intel PSG)
Propagation Delay (tPD) β€” 25 ns
Pin Count β€” 68
Supply Voltage β€” 5 V (typical)
Logic Blocks β€” MAX 5000 LABs (Logic Array Blocks)
Programmable Pins β€” [DATA_NEEDED: number of user I/O pins]
Operating Temperature β€” [DATA_NEEDED: exact operating temperature range]
Erasure Method β€” UV-erasable (windowed ceramic package)
Programming Technology β€” EPROM (non-volatile)
Military Grade β€” Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify)

Datasheets & Resources

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