EPM5192AJC84-20 vs EPM5192AJC-25 Vergleich

Detaillierter Direktvergleich von EPM5192AJC84-20 von Altera und EPM5192AJC-25 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192AJC84-20 EPM5192AJC-25
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $19,20 $8,20
Family MAX 5000 MAX 5000 EPLD
Device Type UV-erasable/OTP Complex PLD (CPLD) —
Macrocells 192 192
Propagation Delay (tpd) 33 ns (speed grade -20) —
Maximale Taktfrequenz 66.7 MHz —
Supply Voltage (Vcc) 4.75 V to 5.25 V —
Dedicated Inputs 7 —
User I/O Lines 64 —
Process Technology CMOS, UV-erasable EEPROM —
Gehäuse 84-pin PLCC J-Lead (WQCCJ, J84) PLCC-68 (windowed ceramic, AJC)
Operating Temperature Grade Commercial —
Montageart Surface Mount (J-Lead) Surface Mount
MSL-Level [DATA_NEEDED: MSL level] —
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Programming Tool Altera MAX+PLUS II / Quartus (legacy) —
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free status] —
Manufacturer — Altera (now Intel PSG)
Propagation Delay (tPD) — 25 ns
Pin-Anzahl — 68
Versorgungsspannung — 5 V (typical)
Logic Blocks — MAX 5000 LABs (Logic Array Blocks)
Programmable Pins — [DATA_NEEDED: number of user I/O pins]
Betriebstemperatur — [DATA_NEEDED: exact operating temperature range]
Erasure Method — UV-erasable (windowed ceramic package)
Programming Technology — EPROM (non-volatile)
Military Grade — Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify)

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern